linux/drivers/gpu/drm/radeon/rv740d.h

/*
 * Copyright 2011 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#ifndef RV740_H
#define RV740_H

#define CG_SPLL_FUNC_CNTL
#define SPLL_RESET
#define SPLL_SLEEP
#define SPLL_BYPASS_EN
#define SPLL_REF_DIV(x)
#define SPLL_REF_DIV_MASK
#define SPLL_PDIV_A(x)
#define SPLL_PDIV_A_MASK
#define CG_SPLL_FUNC_CNTL_2
#define SCLK_MUX_SEL(x)
#define SCLK_MUX_SEL_MASK
#define CG_SPLL_FUNC_CNTL_3
#define SPLL_FB_DIV(x)
#define SPLL_FB_DIV_MASK
#define SPLL_DITHEN

#define MPLL_CNTL_MODE
#define SS_SSEN

#define MPLL_AD_FUNC_CNTL
#define CLKF(x)
#define CLKF_MASK
#define CLKR(x)
#define CLKR_MASK
#define CLKFRAC(x)
#define CLKFRAC_MASK
#define YCLK_POST_DIV(x)
#define YCLK_POST_DIV_MASK
#define IBIAS(x)
#define IBIAS_MASK
#define RESET
#define PDNB
#define MPLL_AD_FUNC_CNTL_2
#define BYPASS
#define BIAS_GEN_PDNB
#define RESET_EN
#define VCO_MODE
#define MPLL_DQ_FUNC_CNTL
#define MPLL_DQ_FUNC_CNTL_2

#define MCLK_PWRMGT_CNTL
#define DLL_SPEED(x)
#define DLL_SPEED_MASK
#define MPLL_PWRMGT_OFF
#define DLL_READY
#define MC_INT_CNTL
#define MRDCKA0_SLEEP
#define MRDCKA1_SLEEP
#define MRDCKB0_SLEEP
#define MRDCKB1_SLEEP
#define MRDCKC0_SLEEP
#define MRDCKC1_SLEEP
#define MRDCKD0_SLEEP
#define MRDCKD1_SLEEP
#define MRDCKA0_RESET
#define MRDCKA1_RESET
#define MRDCKB0_RESET
#define MRDCKB1_RESET
#define MRDCKC0_RESET
#define MRDCKC1_RESET
#define MRDCKD0_RESET
#define MRDCKD1_RESET
#define DLL_READY_READ
#define USE_DISPLAY_GAP
#define USE_DISPLAY_URGENT_NORMAL
#define MPLL_TURNOFF_D2
#define DLL_CNTL
#define MRDCKA0_BYPASS
#define MRDCKA1_BYPASS
#define MRDCKB0_BYPASS
#define MRDCKB1_BYPASS
#define MRDCKC0_BYPASS
#define MRDCKC1_BYPASS
#define MRDCKD0_BYPASS
#define MRDCKD1_BYPASS

#define CG_SPLL_SPREAD_SPECTRUM
#define SSEN
#define CLK_S(x)
#define CLK_S_MASK
#define CG_SPLL_SPREAD_SPECTRUM_2
#define CLK_V(x)
#define CLK_V_MASK

#define MPLL_SS1
#define CLKV(x)
#define CLKV_MASK
#define MPLL_SS2
#define CLKS(x)
#define CLKS_MASK

#endif