/* * Copyright 2011 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Alex Deucher */ #include "radeon.h" #include "rv740d.h" #include "r600_dpm.h" #include "rv770.h" #include "rv770_dpm.h" #include "atom.h" u32 rv740_get_decoded_reference_divider(u32 encoded_ref) { … } struct dll_speed_setting { … }; static struct dll_speed_setting dll_speed_table[16] = …; u32 rv740_get_dll_speed(bool is_gddr5, u32 memory_clock) { … } int rv740_populate_sclk_value(struct radeon_device *rdev, u32 engine_clock, RV770_SMC_SCLK_VALUE *sclk) { … } int rv740_populate_mclk_value(struct radeon_device *rdev, u32 engine_clock, u32 memory_clock, RV7XX_SMC_MCLK_VALUE *mclk) { … } void rv740_read_clock_registers(struct radeon_device *rdev) { … } int rv740_populate_smc_acpi_state(struct radeon_device *rdev, RV770_SMC_STATETABLE *table) { … } void rv740_enable_mclk_spread_spectrum(struct radeon_device *rdev, bool enable) { … } u8 rv740_get_mclk_frequency_ratio(u32 memory_clock) { … }