linux/drivers/gpu/drm/radeon/trinity_dpm.c

/*
 * Copyright 2012 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include <linux/pci.h>
#include <linux/seq_file.h>

#include "r600_dpm.h"
#include "radeon.h"
#include "radeon_asic.h"
#include "trinity_dpm.h"
#include "trinityd.h"
#include "vce.h"

#define TRINITY_MAX_DEEPSLEEP_DIVIDER_ID
#define TRINITY_MINIMUM_ENGINE_CLOCK
#define SCLK_MIN_DIV_INTV_SHIFT
#define TRINITY_DISPCLK_BYPASS_THRESHOLD

#ifndef TRINITY_MGCG_SEQUENCE
#define TRINITY_MGCG_SEQUENCE

static const u32 trinity_mgcg_shls_default[] =;
#endif

#ifndef TRINITY_SYSLS_SEQUENCE
#define TRINITY_SYSLS_SEQUENCE

static const u32 trinity_sysls_disable[] =;

static const u32 trinity_sysls_enable[] =;
#endif

static const u32 trinity_override_mgpg_sequences[] =;

static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
						   const u32 *seq, u32 count);
static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev);
static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
					     struct radeon_ps *new_rps,
					     struct radeon_ps *old_rps);

static struct trinity_ps *trinity_get_ps(struct radeon_ps *rps)
{}

static struct trinity_power_info *trinity_get_pi(struct radeon_device *rdev)
{}

static void trinity_gfx_powergating_initialize(struct radeon_device *rdev)
{}

#define CGCG_CGTT_LOCAL0_MASK
#define CGCG_CGTT_LOCAL1_MASK
#define CGTS_SM_CTRL_REG_DISABLE
#define CGTS_SM_CTRL_REG_ENABLE

static void trinity_mg_clockgating_enable(struct radeon_device *rdev,
					  bool enable)
{}

static void trinity_mg_clockgating_initialize(struct radeon_device *rdev)
{}

static void trinity_gfx_clockgating_enable(struct radeon_device *rdev,
					   bool enable)
{}

static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
						   const u32 *seq, u32 count)
{}

static void trinity_program_override_mgpg_sequences(struct radeon_device *rdev,
						    const u32 *seq, u32 count)
{}

static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev)
{}

static void trinity_ls_clockgating_enable(struct radeon_device *rdev,
					  bool enable)
{}

static void trinity_gfx_powergating_enable(struct radeon_device *rdev,
					   bool enable)
{}

static void trinity_gfx_dynamic_mgpg_enable(struct radeon_device *rdev,
					    bool enable)
{}

static void trinity_enable_clock_power_gating(struct radeon_device *rdev)
{}

static void trinity_disable_clock_power_gating(struct radeon_device *rdev)
{}

static void trinity_set_divider_value(struct radeon_device *rdev,
				      u32 index, u32 sclk)
{}

static void trinity_set_ds_dividers(struct radeon_device *rdev,
				    u32 index, u32 divider)
{}

static void trinity_set_ss_dividers(struct radeon_device *rdev,
				    u32 index, u32 divider)
{}

static void trinity_set_vid(struct radeon_device *rdev, u32 index, u32 vid)
{}

static void trinity_set_allos_gnb_slow(struct radeon_device *rdev,
				       u32 index, u32 gnb_slow)
{}

static void trinity_set_force_nbp_state(struct radeon_device *rdev,
					u32 index, u32 force_nbp_state)
{}

static void trinity_set_display_wm(struct radeon_device *rdev,
				   u32 index, u32 wm)
{}

static void trinity_set_vce_wm(struct radeon_device *rdev,
			       u32 index, u32 wm)
{}

static void trinity_set_at(struct radeon_device *rdev,
			   u32 index, u32 at)
{}

static void trinity_program_power_level(struct radeon_device *rdev,
					struct trinity_pl *pl, u32 index)
{}

static void trinity_power_level_enable_disable(struct radeon_device *rdev,
					       u32 index, bool enable)
{}

static bool trinity_dpm_enabled(struct radeon_device *rdev)
{}

static void trinity_start_dpm(struct radeon_device *rdev)
{}

static void trinity_wait_for_dpm_enabled(struct radeon_device *rdev)
{}

static void trinity_stop_dpm(struct radeon_device *rdev)
{}

static void trinity_start_am(struct radeon_device *rdev)
{}

static void trinity_reset_am(struct radeon_device *rdev)
{}

static void trinity_wait_for_level_0(struct radeon_device *rdev)
{}

static void trinity_enable_power_level_0(struct radeon_device *rdev)
{}

static void trinity_force_level_0(struct radeon_device *rdev)
{}

static void trinity_unforce_levels(struct radeon_device *rdev)
{}

static void trinity_program_power_levels_0_to_n(struct radeon_device *rdev,
						struct radeon_ps *new_rps,
						struct radeon_ps *old_rps)
{}

static void trinity_program_bootup_state(struct radeon_device *rdev)
{}

static void trinity_setup_uvd_clock_table(struct radeon_device *rdev,
					  struct radeon_ps *rps)
{}

static void trinity_setup_uvd_dpm_interval(struct radeon_device *rdev,
					   u32 interval)
{}

static bool trinity_uvd_clocks_zero(struct radeon_ps *rps)
{}

static bool trinity_uvd_clocks_equal(struct radeon_ps *rps1,
				     struct radeon_ps *rps2)
{}

static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
				     struct radeon_ps *new_rps,
				     struct radeon_ps *old_rps)
{}

static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
						       struct radeon_ps *new_rps,
						       struct radeon_ps *old_rps)
{}

static void trinity_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
						      struct radeon_ps *new_rps,
						      struct radeon_ps *old_rps)
{}

static void trinity_set_vce_clock(struct radeon_device *rdev,
				  struct radeon_ps *new_rps,
				  struct radeon_ps *old_rps)
{}

static void trinity_program_ttt(struct radeon_device *rdev)
{}

static void trinity_enable_att(struct radeon_device *rdev)
{}

static void trinity_program_sclk_dpm(struct radeon_device *rdev)
{}

static int trinity_set_thermal_temperature_range(struct radeon_device *rdev,
						 int min_temp, int max_temp)
{}

static void trinity_update_current_ps(struct radeon_device *rdev,
				      struct radeon_ps *rps)
{}

static void trinity_update_requested_ps(struct radeon_device *rdev,
					struct radeon_ps *rps)
{}

void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable)
{}

int trinity_dpm_enable(struct radeon_device *rdev)
{}

int trinity_dpm_late_enable(struct radeon_device *rdev)
{}

void trinity_dpm_disable(struct radeon_device *rdev)
{}

static void trinity_get_min_sclk_divider(struct radeon_device *rdev)
{}

static void trinity_setup_nbp_sim(struct radeon_device *rdev,
				  struct radeon_ps *rps)
{}

int trinity_dpm_force_performance_level(struct radeon_device *rdev,
					enum radeon_dpm_forced_level level)
{}

int trinity_dpm_pre_set_power_state(struct radeon_device *rdev)
{}

int trinity_dpm_set_power_state(struct radeon_device *rdev)
{}

void trinity_dpm_post_set_power_state(struct radeon_device *rdev)
{}

void trinity_dpm_setup_asic(struct radeon_device *rdev)
{}

#if 0
void trinity_dpm_reset_asic(struct radeon_device *rdev)
{
	struct trinity_power_info *pi = trinity_get_pi(rdev);

	trinity_acquire_mutex(rdev);
	if (pi->enable_dpm) {
		trinity_enable_power_level_0(rdev);
		trinity_force_level_0(rdev);
		trinity_wait_for_level_0(rdev);
		trinity_program_bootup_state(rdev);
		trinity_force_level_0(rdev);
		trinity_unforce_levels(rdev);
	}
	trinity_release_mutex(rdev);
}
#endif

static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev,
						  u32 vid_2bit)
{}

static void trinity_patch_boot_state(struct radeon_device *rdev,
				     struct trinity_ps *ps)
{}

static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk)
{}

static void trinity_construct_boot_state(struct radeon_device *rdev)
{}

static u8 trinity_get_sleep_divider_id_from_clock(struct radeon_device *rdev,
						  u32 sclk, u32 min_sclk_in_sr)
{}

static u32 trinity_get_valid_engine_clock(struct radeon_device *rdev,
					  u32 lower_limit)
{}

static void trinity_patch_thermal_state(struct radeon_device *rdev,
					struct trinity_ps *ps,
					struct trinity_ps *current_ps)
{}

static u8 trinity_calculate_display_wm(struct radeon_device *rdev,
				       struct trinity_ps *ps, u32 index)
{}

static u32 trinity_get_uvd_clock_index(struct radeon_device *rdev,
				       struct radeon_ps *rps)
{}

static void trinity_adjust_uvd_state(struct radeon_device *rdev,
				     struct radeon_ps *rps)
{}

static int trinity_get_vce_clock_voltage(struct radeon_device *rdev,
					 u32 evclk, u32 ecclk, u16 *voltage)
{}

static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
					     struct radeon_ps *new_rps,
					     struct radeon_ps *old_rps)
{}

static void trinity_cleanup_asic(struct radeon_device *rdev)
{}

#if 0
static void trinity_pre_display_configuration_change(struct radeon_device *rdev)
{
	struct trinity_power_info *pi = trinity_get_pi(rdev);

	if (pi->voltage_drop_in_dce)
		trinity_dce_enable_voltage_adjustment(rdev, false);
}
#endif

static void trinity_add_dccac_value(struct radeon_device *rdev)
{}

void trinity_dpm_display_configuration_changed(struct radeon_device *rdev)
{}

power_info;

pplib_clock_info;

pplib_power_state;

static void trinity_parse_pplib_non_clock_info(struct radeon_device *rdev,
					       struct radeon_ps *rps,
					       struct _ATOM_PPLIB_NONCLOCK_INFO *non_clock_info,
					       u8 table_rev)
{}

static void trinity_parse_pplib_clock_info(struct radeon_device *rdev,
					   struct radeon_ps *rps, int index,
					   union pplib_clock_info *clock_info)
{}

static int trinity_parse_power_table(struct radeon_device *rdev)
{}

igp_info;

static u32 trinity_convert_did_to_freq(struct radeon_device *rdev, u8 did)
{}

static int trinity_parse_sys_info_table(struct radeon_device *rdev)
{}

int trinity_dpm_init(struct radeon_device *rdev)
{}

void trinity_dpm_print_power_state(struct radeon_device *rdev,
				   struct radeon_ps *rps)
{}

void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
							 struct seq_file *m)
{}

u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev)
{}

u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev)
{}

void trinity_dpm_fini(struct radeon_device *rdev)
{}

u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low)
{}

u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low)
{}