#ifndef __SI_DPM_H__
#define __SI_DPM_H__
#include "ni_dpm.h"
#include "sislands_smc.h"
enum si_cac_config_reg_type { … };
struct si_cac_config_reg { … };
struct si_powertune_data { … };
struct si_dyn_powertune_data { … };
struct si_dte_data { … };
struct si_clock_registers { … };
struct si_mc_reg_entry { … };
struct si_mc_reg_table { … };
#define SISLANDS_MCREGISTERTABLE_INITIAL_SLOT …
#define SISLANDS_MCREGISTERTABLE_ACPI_SLOT …
#define SISLANDS_MCREGISTERTABLE_ULV_SLOT …
#define SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT …
struct si_leakage_voltage_entry { … };
#define SISLANDS_LEAKAGE_INDEX0 …
#define SISLANDS_MAX_LEAKAGE_COUNT …
struct si_leakage_voltage { … };
#define SISLANDS_MAX_HARDWARE_POWERLEVELS …
struct si_ulv_param { … };
struct si_power_info { … };
#define SISLANDS_INITIAL_STATE_ARB_INDEX …
#define SISLANDS_ACPI_STATE_ARB_INDEX …
#define SISLANDS_ULV_STATE_ARB_INDEX …
#define SISLANDS_DRIVER_STATE_ARB_INDEX …
#define SISLANDS_DPM2_MAX_PULSE_SKIP …
#define SISLANDS_DPM2_NEAR_TDP_DEC …
#define SISLANDS_DPM2_ABOVE_SAFE_INC …
#define SISLANDS_DPM2_BELOW_SAFE_INC …
#define SISLANDS_DPM2_TDP_SAFE_LIMIT_PERCENT …
#define SISLANDS_DPM2_MAXPS_PERCENT_H …
#define SISLANDS_DPM2_MAXPS_PERCENT_M …
#define SISLANDS_DPM2_SQ_RAMP_MAX_POWER …
#define SISLANDS_DPM2_SQ_RAMP_MIN_POWER …
#define SISLANDS_DPM2_SQ_RAMP_MAX_POWER_DELTA …
#define SISLANDS_DPM2_SQ_RAMP_STI_SIZE …
#define SISLANDS_DPM2_SQ_RAMP_LTI_RATIO …
#define SISLANDS_DPM2_PWREFFICIENCYRATIO_MARGIN …
#define SISLANDS_VRC_DFLT …
#define SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT …
#define SISLANDS_CGULVPARAMETER_DFLT …
#define SISLANDS_CGULVCONTROL_DFLT …
u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
u8 si_get_mclk_frequency_ratio(u32 memory_clock, bool strobe_mode);
void si_trim_voltage_table_to_fit_state_table(struct radeon_device *rdev,
u32 max_voltage_steps,
struct atom_voltage_table *voltage_table);
#endif