linux/drivers/gpu/drm/amd/amdgpu/soc15_common.h

/*
 * Copyright 2016 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifndef __SOC15_COMMON_H__
#define __SOC15_COMMON_H__

/* GET_INST returns the physical instance corresponding to a logical instance */
#define GET_INST(ip, inst)
#define GET_MASK(ip, mask)

/* Register Access Macros */
#define SOC15_REG_OFFSET(ip, inst, reg)
#define SOC15_REG_OFFSET1(ip, inst, reg, offset)

#define __WREG32_SOC15_RLC__(reg, value, flag, hwip, inst)

#define __RREG32_SOC15_RLC__(reg, flag, hwip, inst)

#define WREG32_FIELD15(ip, idx, reg, field, val)

#define WREG32_FIELD15_PREREG(ip, idx, reg_name, field, val)

#define RREG32_SOC15(ip, inst, reg)

#define RREG32_SOC15_IP(ip, reg)

#define RREG32_SOC15_IP_NO_KIQ(ip, reg, inst)

#define RREG32_SOC15_NO_KIQ(ip, inst, reg)

#define RREG32_SOC15_OFFSET(ip, inst, reg, offset)

#define WREG32_SOC15(ip, inst, reg, value)

#define WREG32_SOC15_IP(ip, reg, value)

#define WREG32_SOC15_IP_NO_KIQ(ip, reg, value, inst)

#define WREG32_SOC15_NO_KIQ(ip, inst, reg, value)

#define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value)

#define SOC15_WAIT_ON_RREG(ip, inst, reg, expected_value, mask)

#define SOC15_WAIT_ON_RREG_OFFSET(ip, inst, reg, offset, expected_value, mask)

#define WREG32_RLC(reg, value)

#define WREG32_RLC_EX(prefix, reg, value, inst)

/* shadow the registers in the callback function */
#define WREG32_SOC15_RLC_SHADOW(ip, inst, reg, value)

/* for GC only */
#define RREG32_RLC(reg)

#define WREG32_RLC_NO_KIQ(reg, value, hwip)

#define RREG32_RLC_NO_KIQ(reg, hwip)

#define WREG32_SOC15_RLC_SHADOW_EX(prefix, ip, inst, reg, value)

#define RREG32_SOC15_RLC(ip, inst, reg)

#define WREG32_SOC15_RLC(ip, inst, reg, value)

#define WREG32_SOC15_RLC_EX(prefix, ip, inst, reg, value)

#define WREG32_FIELD15_RLC(ip, idx, reg, field, val)

#define WREG32_SOC15_OFFSET_RLC(ip, inst, reg, offset, value)

#define RREG32_SOC15_OFFSET_RLC(ip, inst, reg, offset)

/* inst equals to ext for some IPs */
#define RREG32_SOC15_EXT(ip, inst, reg, ext) \

#define WREG32_SOC15_EXT(ip, inst, reg, ext, value) \

#define RREG64_MCA(ext, mca_base, idx)

#define WREG64_MCA(ext, mca_base, idx, val)

#endif