linux/drivers/gpu/drm/amd/include/cgs_common.h

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 *
 */
#ifndef _CGS_COMMON_H
#define _CGS_COMMON_H

#include "amd_shared.h"

struct cgs_device;

/**
 * enum cgs_ind_reg - Indirect register spaces
 */
enum cgs_ind_reg {};

/*
 * enum cgs_ucode_id - Firmware types for different IPs
 */
enum cgs_ucode_id {};

/**
 * struct cgs_firmware_info - Firmware information
 */
struct cgs_firmware_info {};

cgs_handle_t;

/**
 * cgs_read_register() - Read an MMIO register
 * @cgs_device:	opaque device handle
 * @offset:	register offset
 *
 * Return:  register value
 */
cgs_read_register_t;

/**
 * cgs_write_register() - Write an MMIO register
 * @cgs_device:	opaque device handle
 * @offset:	register offset
 * @value:	register value
 */
cgs_write_register_t;

/**
 * cgs_read_ind_register() - Read an indirect register
 * @cgs_device:	opaque device handle
 * @offset:	register offset
 *
 * Return:  register value
 */
cgs_read_ind_register_t;

/**
 * cgs_write_ind_register() - Write an indirect register
 * @cgs_device:	opaque device handle
 * @offset:	register offset
 * @value:	register value
 */
cgs_write_ind_register_t;

#define CGS_REG_FIELD_SHIFT(reg, field)
#define CGS_REG_FIELD_MASK(reg, field)

#define CGS_REG_SET_FIELD(orig_val, reg, field, field_val)

#define CGS_REG_GET_FIELD(value, reg, field)

#define CGS_WREG32_FIELD(device, reg, field, val)

#define CGS_WREG32_FIELD_IND(device, space, reg, field, val)

cgs_get_firmware_info;

struct cgs_ops {};

struct cgs_os_ops; /* To be define in OS-specific CGS header */

struct cgs_device {};

/* Convenience macros that make CGS indirect function calls look like
 * normal function calls */
#define CGS_CALL(func, dev, ...)
#define CGS_OS_CALL(func, dev, ...)

#define cgs_read_register(dev, offset)
#define cgs_write_register(dev, offset, value)
#define cgs_read_ind_register(dev, space, index)
#define cgs_write_ind_register(dev, space, index, value)

#define cgs_get_firmware_info(dev, type, info)

#endif /* _CGS_COMMON_H */