linux/drivers/gpu/drm/amd/include/pptable.h

/*
 * Copyright 2013 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef _PPTABLE_H
#define _PPTABLE_H

#pragma pack(1)

ATOM_PPLIB_THERMALCONTROLLER;

#define ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK
#define ATOM_PP_FANPARAMETERS_NOFAN

#define ATOM_PP_THERMALCONTROLLER_NONE
#define ATOM_PP_THERMALCONTROLLER_LM63
#define ATOM_PP_THERMALCONTROLLER_ADM1032
#define ATOM_PP_THERMALCONTROLLER_ADM1030
#define ATOM_PP_THERMALCONTROLLER_MUA6649
#define ATOM_PP_THERMALCONTROLLER_LM64
#define ATOM_PP_THERMALCONTROLLER_F75375
#define ATOM_PP_THERMALCONTROLLER_RV6xx
#define ATOM_PP_THERMALCONTROLLER_RV770
#define ATOM_PP_THERMALCONTROLLER_ADT7473
#define ATOM_PP_THERMALCONTROLLER_KONG
#define ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO
#define ATOM_PP_THERMALCONTROLLER_EVERGREEN
#define ATOM_PP_THERMALCONTROLLER_EMC2103
#define ATOM_PP_THERMALCONTROLLER_SUMO
#define ATOM_PP_THERMALCONTROLLER_NISLANDS
#define ATOM_PP_THERMALCONTROLLER_SISLANDS
#define ATOM_PP_THERMALCONTROLLER_LM96163
#define ATOM_PP_THERMALCONTROLLER_CISLANDS
#define ATOM_PP_THERMALCONTROLLER_KAVERI
#define ATOM_PP_THERMALCONTROLLER_ICELAND
#define ATOM_PP_THERMALCONTROLLER_TONGA
#define ATOM_PP_THERMALCONTROLLER_FIJI
#define ATOM_PP_THERMALCONTROLLER_POLARIS10
#define ATOM_PP_THERMALCONTROLLER_VEGA10


// Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
// We probably should reserve the bit 0x80 for this use.
// To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
// The driver can pick the correct internal controller based on the ASIC.
#define ATOM_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL
#define ATOM_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL

ATOM_PPLIB_STATE;


ATOM_PPLIB_FANTABLE;

ATOM_PPLIB_FANTABLE2;

ATOM_PPLIB_FANTABLE3;

ATOM_PPLIB_FANTABLE4;

ATOM_PPLIB_FANTABLE5;

ATOM_PPLIB_EXTENDEDHEADER;

//// ATOM_PPLIB_POWERPLAYTABLE::ulPlatformCaps
#define ATOM_PP_PLATFORM_CAP_BACKBIAS
#define ATOM_PP_PLATFORM_CAP_POWERPLAY
#define ATOM_PP_PLATFORM_CAP_SBIOSPOWERSOURCE
#define ATOM_PP_PLATFORM_CAP_ASPM_L0s
#define ATOM_PP_PLATFORM_CAP_ASPM_L1
#define ATOM_PP_PLATFORM_CAP_HARDWAREDC
#define ATOM_PP_PLATFORM_CAP_GEMINIPRIMARY
#define ATOM_PP_PLATFORM_CAP_STEPVDDC
#define ATOM_PP_PLATFORM_CAP_VOLTAGECONTROL
#define ATOM_PP_PLATFORM_CAP_SIDEPORTCONTROL
#define ATOM_PP_PLATFORM_CAP_TURNOFFPLL_ASPML1
#define ATOM_PP_PLATFORM_CAP_HTLINKCONTROL
#define ATOM_PP_PLATFORM_CAP_MVDDCONTROL
#define ATOM_PP_PLATFORM_CAP_GOTO_BOOT_ON_ALERT
#define ATOM_PP_PLATFORM_CAP_DONT_WAIT_FOR_VBLANK_ON_ALERT
#define ATOM_PP_PLATFORM_CAP_VDDCI_CONTROL
#define ATOM_PP_PLATFORM_CAP_REGULATOR_HOT
#define ATOM_PP_PLATFORM_CAP_BACO
#define ATOM_PP_PLATFORM_CAP_NEW_CAC_VOLTAGE
#define ATOM_PP_PLATFORM_CAP_REVERT_GPIO5_POLARITY
#define ATOM_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17
#define ATOM_PP_PLATFORM_CAP_VRHOT_GPIO_CONFIGURABLE
#define ATOM_PP_PLATFORM_CAP_TEMP_INVERSION
#define ATOM_PP_PLATFORM_CAP_EVV
#define ATOM_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL
#define ATOM_PP_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE
#define ATOM_PP_PLATFORM_CAP_DISABLE_USING_ACTUAL_TEMPERATURE_FOR_POWER_CALC
#define ATOM_PP_PLATFORM_CAP_VRHOT_POLARITY_HIGH

ATOM_PPLIB_POWERPLAYTABLE;

LPATOM_PPLIB_POWERPLAYTABLE2;

LPATOM_PPLIB_POWERPLAYTABLE3;

LPATOM_PPLIB_POWERPLAYTABLE4;

LPATOM_PPLIB_POWERPLAYTABLE5;

//// ATOM_PPLIB_NONCLOCK_INFO::usClassification
#define ATOM_PPLIB_CLASSIFICATION_UI_MASK
#define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT
#define ATOM_PPLIB_CLASSIFICATION_UI_NONE
#define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY
#define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED
#define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE
// 2, 4, 6, 7 are reserved

#define ATOM_PPLIB_CLASSIFICATION_BOOT
#define ATOM_PPLIB_CLASSIFICATION_THERMAL
#define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE
#define ATOM_PPLIB_CLASSIFICATION_REST
#define ATOM_PPLIB_CLASSIFICATION_FORCED
#define ATOM_PPLIB_CLASSIFICATION_3DPERFORMANCE
#define ATOM_PPLIB_CLASSIFICATION_OVERDRIVETEMPLATE
#define ATOM_PPLIB_CLASSIFICATION_UVDSTATE
#define ATOM_PPLIB_CLASSIFICATION_3DLOW
#define ATOM_PPLIB_CLASSIFICATION_ACPI
#define ATOM_PPLIB_CLASSIFICATION_HD2STATE
#define ATOM_PPLIB_CLASSIFICATION_HDSTATE
#define ATOM_PPLIB_CLASSIFICATION_SDSTATE

//// ATOM_PPLIB_NONCLOCK_INFO::usClassification2
#define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2
#define ATOM_PPLIB_CLASSIFICATION2_ULV
#define ATOM_PPLIB_CLASSIFICATION2_MVC

//// ATOM_PPLIB_NONCLOCK_INFO::ulCapsAndSettings
#define ATOM_PPLIB_SINGLE_DISPLAY_ONLY
#define ATOM_PPLIB_SUPPORTS_VIDEO_PLAYBACK

// 0 is 2.5Gb/s, 1 is 5Gb/s
#define ATOM_PPLIB_PCIE_LINK_SPEED_MASK
#define ATOM_PPLIB_PCIE_LINK_SPEED_SHIFT

// lanes - 1: 1, 2, 4, 8, 12, 16 permitted by PCIE spec
#define ATOM_PPLIB_PCIE_LINK_WIDTH_MASK
#define ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT

// lookup into reduced refresh-rate table
#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_MASK
#define ATOM_PPLIB_LIMITED_REFRESHRATE_VALUE_SHIFT

#define ATOM_PPLIB_LIMITED_REFRESHRATE_UNLIMITED
#define ATOM_PPLIB_LIMITED_REFRESHRATE_50HZ
// 2-15 TBD as needed.

#define ATOM_PPLIB_SOFTWARE_DISABLE_LOADBALANCING
#define ATOM_PPLIB_SOFTWARE_ENABLE_SLEEP_FOR_TIMESTAMPS

#define ATOM_PPLIB_DISALLOW_ON_DC

#define ATOM_PPLIB_ENABLE_VARIBRIGHT

//memory related flags
#define ATOM_PPLIB_SWSTATE_MEMORY_DLL_OFF

//M3 Arb    //2bits, current 3 sets of parameters in total
#define ATOM_PPLIB_M3ARB_MASK
#define ATOM_PPLIB_M3ARB_SHIFT

#define ATOM_PPLIB_ENABLE_DRR

// remaining 16 bits are reserved
LPATOM_PPLIB_THERMAL_STATE;

// Contained in an array starting at the offset
// in ATOM_PPLIB_POWERPLAYTABLE::usNonClockInfoArrayOffset.
// referenced from ATOM_PPLIB_STATE_INFO::ucNonClockStateIndex
#define ATOM_PPLIB_NONCLOCKINFO_VER1
#define ATOM_PPLIB_NONCLOCKINFO_VER2
ATOM_PPLIB_NONCLOCK_INFO;

// Contained in an array starting at the offset
// in ATOM_PPLIB_POWERPLAYTABLE::usClockInfoArrayOffset.
// referenced from ATOM_PPLIB_STATE::ucClockStateIndices
ATOM_PPLIB_R600_CLOCK_INFO;

// ulFlags in ATOM_PPLIB_R600_CLOCK_INFO
#define ATOM_PPLIB_R600_FLAGS_PCIEGEN2
#define ATOM_PPLIB_R600_FLAGS_UVDSAFE
#define ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE
#define ATOM_PPLIB_R600_FLAGS_MEMORY_ODT_OFF
#define ATOM_PPLIB_R600_FLAGS_MEMORY_DLL_OFF
#define ATOM_PPLIB_R600_FLAGS_LOWPOWER

ATOM_PPLIB_RS780_CLOCK_INFO;

#define ATOM_PPLIB_RS780_VOLTAGE_NONE 
#define ATOM_PPLIB_RS780_VOLTAGE_LOW 
#define ATOM_PPLIB_RS780_VOLTAGE_HIGH 
#define ATOM_PPLIB_RS780_VOLTAGE_VARIABLE 

#define ATOM_PPLIB_RS780_SPMCLK_NONE
#define ATOM_PPLIB_RS780_SPMCLK_LOW
#define ATOM_PPLIB_RS780_SPMCLK_HIGH

#define ATOM_PPLIB_RS780_HTLINKFREQ_NONE 
#define ATOM_PPLIB_RS780_HTLINKFREQ_LOW 
#define ATOM_PPLIB_RS780_HTLINKFREQ_HIGH 

ATOM_PPLIB_EVERGREEN_CLOCK_INFO;

ATOM_PPLIB_SI_CLOCK_INFO;

ATOM_PPLIB_CI_CLOCK_INFO;

ATOM_PPLIB_SUMO_CLOCK_INFO;

ATOM_PPLIB_KV_CLOCK_INFO;

ATOM_PPLIB_CZ_CLOCK_INFO;

ATOM_PPLIB_STATE_V2;

StateArray;


ClockInfoArray;

NonClockInfoArray;

ATOM_PPLIB_Clock_Voltage_Dependency_Record;

ATOM_PPLIB_Clock_Voltage_Dependency_Table;

ATOM_PPLIB_Clock_Voltage_Limit_Record;

ATOM_PPLIB_Clock_Voltage_Limit_Table;

_ATOM_PPLIB_CAC_Leakage_Record;

ATOM_PPLIB_CAC_Leakage_Record;

ATOM_PPLIB_CAC_Leakage_Table;

ATOM_PPLIB_PhaseSheddingLimits_Record;

ATOM_PPLIB_PhaseSheddingLimits_Table;

VCEClockInfo;

VCEClockInfoArray;

ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record;

ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table;

ATOM_PPLIB_VCE_State_Record;

ATOM_PPLIB_VCE_State_Table;


ATOM_PPLIB_VCE_Table;


UVDClockInfo;

UVDClockInfoArray;

ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record;

ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table;

ATOM_PPLIB_UVD_Table;

ATOM_PPLIB_SAMClk_Voltage_Limit_Record;

ATOM_PPLIB_SAMClk_Voltage_Limit_Table;

ATOM_PPLIB_SAMU_Table;

ATOM_PPLIB_ACPClk_Voltage_Limit_Record;

ATOM_PPLIB_ACPClk_Voltage_Limit_Table;

ATOM_PPLIB_ACP_Table;

ATOM_PowerTune_Table;

ATOM_PPLIB_POWERTUNE_Table;

ATOM_PPLIB_POWERTUNE_Table_V1;

#define ATOM_PPM_A_A
#define ATOM_PPM_A_I
ATOM_PPLIB_PPM_Table;

#define VQ_DisplayConfig_NoneAWD
#define VQ_DisplayConfig_AWD

ATOM_PPLIB_VQ_Budgeting_Record;

ATOM_PPLIB_VQ_Budgeting_Table;

#pragma pack()

#endif