/* * Copyright 2022 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef __AMDGPU_VPE_H__ #define __AMDGPU_VPE_H__ #include "amdgpu_ring.h" #include "amdgpu_irq.h" #include "vpe_6_1_fw_if.h" #define AMDGPU_MAX_VPE_INSTANCES … struct amdgpu_vpe; struct vpe_funcs { … }; struct vpe_regs { … }; struct amdgpu_vpe { … }; int amdgpu_vpe_psp_update_sram(struct amdgpu_device *adev); int amdgpu_vpe_init_microcode(struct amdgpu_vpe *vpe); int amdgpu_vpe_ring_init(struct amdgpu_vpe *vpe); int amdgpu_vpe_ring_fini(struct amdgpu_vpe *vpe); int amdgpu_vpe_configure_dpm(struct amdgpu_vpe *vpe); #define vpe_ring_init(vpe) … #define vpe_ring_start(vpe) … #define vpe_ring_stop(vpe) … #define vpe_ring_fini(vpe) … #define vpe_get_reg_offset(vpe, inst, offset) … #define vpe_set_regs(vpe) … #define vpe_irq_init(vpe) … #define vpe_init_microcode(vpe) … #define vpe_load_microcode(vpe) … extern const struct amdgpu_ip_block_version vpe_v6_1_ip_block; #endif
Codebase Browser
linux