linux/drivers/gpu/drm/amd/display/include/link_service_types.h

/*
 * Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DAL_LINK_SERVICE_TYPES_H__
#define __DAL_LINK_SERVICE_TYPES_H__

#include "grph_object_id.h"
#include "dal_types.h"
#include "irq_types.h"

/*struct mst_mgr_callback_object;*/
struct ddc;
struct irq_manager;

enum dp_power_state {};

enum edp_revision {};

enum {};

enum lttpr_mode {};

struct link_training_settings {};

/*TODO: Move this enum test harness*/
/* Test patterns*/
enum dp_test_pattern {};

#define IS_DP_PHY_SQUARE_PATTERN(test_pattern)

#define IS_DP_PHY_PATTERN(test_pattern)

enum dp_test_pattern_color_space {};

enum dp_panel_mode {};

enum dpcd_source_sequence {};

/* DPCD_ADDR_TRAINING_LANEx_SET registers value */
dpcd_training_lane_set;


/* AMD's copy of various payload data for MST. We have two copies of the payload table (one in DRM,
 * one in DC) since DRM's MST helpers can't be accessed here. This stream allocation table should
 * _ONLY_ be filled out from DM and then passed to DC, do NOT use these for _any_ kind of atomic
 * state calculations in DM, or you will break something.
 */

struct drm_dp_mst_port;

/* DP MST stream allocation (payload bandwidth number) */
struct dc_dp_mst_stream_allocation {};

/* DP MST stream allocation table */
struct dc_dp_mst_stream_allocation_table {};

#endif /*__DAL_LINK_SERVICE_TYPES_H__*/