#include <drm/amdgpu_drm.h>
#include "amdgpu.h"
#include "amdgpu_atombios.h"
#include "amdgpu_atomfirmware.h"
#include "amdgpu_i2c.h"
#include "amdgpu_display.h"
#include "atom.h"
#include "atom-bits.h"
#include "atombios_encoders.h"
#include "bif/bif_4_1_d.h"
static void amdgpu_atombios_lookup_i2c_gpio_quirks(struct amdgpu_device *adev,
ATOM_GPIO_I2C_ASSIGMENT *gpio,
u8 index)
{ … }
static struct amdgpu_i2c_bus_rec amdgpu_atombios_get_bus_rec_for_i2c_gpio(ATOM_GPIO_I2C_ASSIGMENT *gpio)
{ … }
struct amdgpu_i2c_bus_rec amdgpu_atombios_lookup_i2c_gpio(struct amdgpu_device *adev,
uint8_t id)
{ … }
void amdgpu_atombios_i2c_init(struct amdgpu_device *adev)
{ … }
struct amdgpu_gpio_rec
amdgpu_atombios_lookup_gpio(struct amdgpu_device *adev,
u8 id)
{ … }
static struct amdgpu_hpd
amdgpu_atombios_get_hpd_info_from_gpio(struct amdgpu_device *adev,
struct amdgpu_gpio_rec *gpio)
{ … }
static const int object_connector_convert[] = …;
bool amdgpu_atombios_has_dce_engine_info(struct amdgpu_device *adev)
{ … }
bool amdgpu_atombios_get_connector_info_from_object_table(struct amdgpu_device *adev)
{ … }
firmware_info;
int amdgpu_atombios_get_clock_info(struct amdgpu_device *adev)
{ … }
gfx_info;
int amdgpu_atombios_get_gfx_info(struct amdgpu_device *adev)
{ … }
igp_info;
int amdgpu_atombios_get_vram_width(struct amdgpu_device *adev)
{ … }
static void amdgpu_atombios_get_igp_ss_overrides(struct amdgpu_device *adev,
struct amdgpu_atom_ss *ss,
int id)
{ … }
asic_ss_info;
asic_ss_assignment;
bool amdgpu_atombios_get_asic_ss_info(struct amdgpu_device *adev,
struct amdgpu_atom_ss *ss,
int id, u32 clock)
{ … }
get_clock_dividers;
int amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev,
u8 clock_type,
u32 clock,
bool strobe_mode,
struct atom_clock_dividers *dividers)
{ … }
#ifdef CONFIG_DRM_AMDGPU_SI
int amdgpu_atombios_get_memory_pll_dividers(struct amdgpu_device *adev,
u32 clock,
bool strobe_mode,
struct atom_mpll_param *mpll_param)
{ … }
void amdgpu_atombios_set_engine_dram_timings(struct amdgpu_device *adev,
u32 eng_clock, u32 mem_clock)
{ … }
void amdgpu_atombios_get_default_voltages(struct amdgpu_device *adev,
u16 *vddc, u16 *vddci, u16 *mvdd)
{ … }
set_voltage;
int amdgpu_atombios_get_max_vddc(struct amdgpu_device *adev, u8 voltage_type,
u16 voltage_id, u16 *voltage)
{ … }
int amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx(struct amdgpu_device *adev,
u16 *voltage,
u16 leakage_idx)
{ … }
voltage_object_info;
voltage_object;
static ATOM_VOLTAGE_OBJECT_V3 *amdgpu_atombios_lookup_voltage_object_v3(ATOM_VOLTAGE_OBJECT_INFO_V3_1 *v3,
u8 voltage_type, u8 voltage_mode)
{ … }
int amdgpu_atombios_get_svi2_info(struct amdgpu_device *adev,
u8 voltage_type,
u8 *svd_gpio_id, u8 *svc_gpio_id)
{ … }
bool
amdgpu_atombios_is_voltage_gpio(struct amdgpu_device *adev,
u8 voltage_type, u8 voltage_mode)
{ … }
int amdgpu_atombios_get_voltage_table(struct amdgpu_device *adev,
u8 voltage_type, u8 voltage_mode,
struct atom_voltage_table *voltage_table)
{ … }
vram_info;
#define MEM_ID_MASK …
#define MEM_ID_SHIFT …
#define CLOCK_RANGE_MASK …
#define CLOCK_RANGE_SHIFT …
#define LOW_NIBBLE_MASK …
#define DATA_EQU_PREV …
#define DATA_FROM_TABLE …
int amdgpu_atombios_init_mc_reg_table(struct amdgpu_device *adev,
u8 module_index,
struct atom_mc_reg_table *reg_table)
{ … }
#endif
bool amdgpu_atombios_has_gpu_virtualization_table(struct amdgpu_device *adev)
{ … }
void amdgpu_atombios_scratch_regs_lock(struct amdgpu_device *adev, bool lock)
{ … }
static void amdgpu_atombios_scratch_regs_init(struct amdgpu_device *adev)
{ … }
void amdgpu_atombios_scratch_regs_engine_hung(struct amdgpu_device *adev,
bool hung)
{ … }
void amdgpu_atombios_scratch_regs_set_backlight_level(struct amdgpu_device *adev,
u32 backlight_level)
{ … }
bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev)
{ … }
void amdgpu_atombios_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
{ … }
static int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
{ … }
static uint32_t cail_pll_read(struct card_info *info, uint32_t reg)
{ … }
static void cail_pll_write(struct card_info *info, uint32_t reg, uint32_t val)
{ … }
static uint32_t cail_mc_read(struct card_info *info, uint32_t reg)
{ … }
static void cail_mc_write(struct card_info *info, uint32_t reg, uint32_t val)
{ … }
static void cail_reg_write(struct card_info *info, uint32_t reg, uint32_t val)
{ … }
static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
{ … }
static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev,
struct device_attribute *attr,
char *buf)
{ … }
static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,
NULL);
static struct attribute *amdgpu_vbios_version_attrs[] = …;
const struct attribute_group amdgpu_vbios_version_attr_group = …;
int amdgpu_atombios_sysfs_init(struct amdgpu_device *adev)
{ … }
void amdgpu_atombios_fini(struct amdgpu_device *adev)
{ … }
int amdgpu_atombios_init(struct amdgpu_device *adev)
{ … }
int amdgpu_atombios_get_data_table(struct amdgpu_device *adev,
uint32_t table,
uint16_t *size,
uint8_t *frev,
uint8_t *crev,
uint8_t **addr)
{ … }