/* * Copyright 2008 Advanced Micro Devices, Inc. * Copyright 2008 Red Hat Inc. * Copyright 2009 Jerome Glisse. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Dave Airlie * Alex Deucher * Jerome Glisse * Christian König */ #include <linux/seq_file.h> #include <linux/slab.h> #include <linux/uaccess.h> #include <linux/debugfs.h> #include <drm/amdgpu_drm.h> #include "amdgpu.h" #include "atom.h" /* * Rings * Most engines on the GPU are fed via ring buffers. Ring * buffers are areas of GPU accessible memory that the host * writes commands into and the GPU reads commands out of. * There is a rptr (read pointer) that determines where the * GPU is currently reading, and a wptr (write pointer) * which determines where the host has written. When the * pointers are equal, the ring is idle. When the host * writes commands to the ring buffer, it increments the * wptr. The GPU then starts fetching commands and executes * them until the pointers are equal again. */ /** * amdgpu_ring_max_ibs - Return max IBs that fit in a single submission. * * @type: ring type for which to return the limit. */ unsigned int amdgpu_ring_max_ibs(enum amdgpu_ring_type type) { … } /** * amdgpu_ring_alloc - allocate space on the ring buffer * * @ring: amdgpu_ring structure holding ring information * @ndw: number of dwords to allocate in the ring buffer * * Allocate @ndw dwords in the ring buffer (all asics). * Returns 0 on success, error on failure. */ int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned int ndw) { … } /** amdgpu_ring_insert_nop - insert NOP packets * * @ring: amdgpu_ring structure holding ring information * @count: the number of NOP packets to insert * * This is the generic insert_nop function for rings except SDMA */ void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) { … } /** * amdgpu_ring_generic_pad_ib - pad IB with NOP packets * * @ring: amdgpu_ring structure holding ring information * @ib: IB to add NOP packets to * * This is the generic pad_ib function for rings except SDMA */ void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) { … } /** * amdgpu_ring_commit - tell the GPU to execute the new * commands on the ring buffer * * @ring: amdgpu_ring structure holding ring information * * Update the wptr (write pointer) to tell the GPU to * execute new commands on the ring buffer (all asics). */ void amdgpu_ring_commit(struct amdgpu_ring *ring) { … } /** * amdgpu_ring_undo - reset the wptr * * @ring: amdgpu_ring structure holding ring information * * Reset the driver's copy of the wptr (all asics). */ void amdgpu_ring_undo(struct amdgpu_ring *ring) { … } #define amdgpu_ring_get_gpu_addr(ring, offset) … #define amdgpu_ring_get_cpu_addr(ring, offset) … /** * amdgpu_ring_init - init driver ring struct. * * @adev: amdgpu_device pointer * @ring: amdgpu_ring structure holding ring information * @max_dw: maximum number of dw for ring alloc * @irq_src: interrupt source to use for this ring * @irq_type: interrupt type to use for this ring * @hw_prio: ring priority (NORMAL/HIGH) * @sched_score: optional score atomic shared with other schedulers * * Initialize the driver information for the selected ring (all asics). * Returns 0 on success, error on failure. */ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned int max_dw, struct amdgpu_irq_src *irq_src, unsigned int irq_type, unsigned int hw_prio, atomic_t *sched_score) { … } /** * amdgpu_ring_fini - tear down the driver ring struct. * * @ring: amdgpu_ring structure holding ring information * * Tear down the driver information for the selected ring (all asics). */ void amdgpu_ring_fini(struct amdgpu_ring *ring) { … } /** * amdgpu_ring_emit_reg_write_reg_wait_helper - ring helper * * @ring: ring to write to * @reg0: register to write * @reg1: register to wait on * @ref: reference value to write/wait on * @mask: mask to wait on * * Helper for rings that don't support write and wait in a * single oneshot packet. */ void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring, uint32_t reg0, uint32_t reg1, uint32_t ref, uint32_t mask) { … } /** * amdgpu_ring_soft_recovery - try to soft recover a ring lockup * * @ring: ring to try the recovery on * @vmid: VMID we try to get going again * @fence: timedout fence * * Tries to get a ring proceeding again when it is stuck. */ bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid, struct dma_fence *fence) { … } /* * Debugfs info */ #if defined(CONFIG_DEBUG_FS) /* Layout of file is 12 bytes consisting of * - rptr * - wptr * - driver's copy of wptr * * followed by n-words of ring data */ static ssize_t amdgpu_debugfs_ring_read(struct file *f, char __user *buf, size_t size, loff_t *pos) { … } static const struct file_operations amdgpu_debugfs_ring_fops = …; static ssize_t amdgpu_debugfs_mqd_read(struct file *f, char __user *buf, size_t size, loff_t *pos) { … } static const struct file_operations amdgpu_debugfs_mqd_fops = …; static int amdgpu_debugfs_ring_error(void *data, u64 val) { … } DEFINE_DEBUGFS_ATTRIBUTE_SIGNED(…); #endif void amdgpu_debugfs_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring) { … } /** * amdgpu_ring_test_helper - tests ring and set sched readiness status * * @ring: ring to try the recovery on * * Tests ring and set sched readiness status * * Returns 0 on success, error on failure. */ int amdgpu_ring_test_helper(struct amdgpu_ring *ring) { … } static void amdgpu_ring_to_mqd_prop(struct amdgpu_ring *ring, struct amdgpu_mqd_prop *prop) { … } int amdgpu_ring_init_mqd(struct amdgpu_ring *ring) { … } void amdgpu_ring_ib_begin(struct amdgpu_ring *ring) { … } void amdgpu_ring_ib_end(struct amdgpu_ring *ring) { … } void amdgpu_ring_ib_on_emit_cntl(struct amdgpu_ring *ring) { … } void amdgpu_ring_ib_on_emit_ce(struct amdgpu_ring *ring) { … } void amdgpu_ring_ib_on_emit_de(struct amdgpu_ring *ring) { … } bool amdgpu_ring_sched_ready(struct amdgpu_ring *ring) { … }
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