/* * Copyright 2008 Advanced Micro Devices, Inc. * Copyright 2008 Red Hat Inc. * Copyright 2009 Jerome Glisse. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: Dave Airlie * Alex Deucher * Jerome Glisse */ #include <linux/dma-fence-array.h> #include <linux/interval_tree_generic.h> #include <linux/idr.h> #include <linux/dma-buf.h> #include <drm/amdgpu_drm.h> #include <drm/drm_drv.h> #include <drm/ttm/ttm_tt.h> #include <drm/drm_exec.h> #include "amdgpu.h" #include "amdgpu_trace.h" #include "amdgpu_amdkfd.h" #include "amdgpu_gmc.h" #include "amdgpu_xgmi.h" #include "amdgpu_dma_buf.h" #include "amdgpu_res_cursor.h" #include "kfd_svm.h" /** * DOC: GPUVM * * GPUVM is the MMU functionality provided on the GPU. * GPUVM is similar to the legacy GART on older asics, however * rather than there being a single global GART table * for the entire GPU, there can be multiple GPUVM page tables active * at any given time. The GPUVM page tables can contain a mix * VRAM pages and system pages (both memory and MMIO) and system pages * can be mapped as snooped (cached system pages) or unsnooped * (uncached system pages). * * Each active GPUVM has an ID associated with it and there is a page table * linked with each VMID. When executing a command buffer, * the kernel tells the engine what VMID to use for that command * buffer. VMIDs are allocated dynamically as commands are submitted. * The userspace drivers maintain their own address space and the kernel * sets up their pages tables accordingly when they submit their * command buffers and a VMID is assigned. * The hardware supports up to 16 active GPUVMs at any given time. * * Each GPUVM is represented by a 1-2 or 1-5 level page table, depending * on the ASIC family. GPUVM supports RWX attributes on each page as well * as other features such as encryption and caching attributes. * * VMID 0 is special. It is the GPUVM used for the kernel driver. In * addition to an aperture managed by a page table, VMID 0 also has * several other apertures. There is an aperture for direct access to VRAM * and there is a legacy AGP aperture which just forwards accesses directly * to the matching system physical addresses (or IOVAs when an IOMMU is * present). These apertures provide direct access to these memories without * incurring the overhead of a page table. VMID 0 is used by the kernel * driver for tasks like memory management. * * GPU clients (i.e., engines on the GPU) use GPUVM VMIDs to access memory. * For user applications, each application can have their own unique GPUVM * address space. The application manages the address space and the kernel * driver manages the GPUVM page tables for each process. If an GPU client * accesses an invalid page, it will generate a GPU page fault, similar to * accessing an invalid page on a CPU. */ #define START … #define LAST … INTERVAL_TREE_DEFINE(…) #undef START #undef LAST /** * struct amdgpu_prt_cb - Helper to disable partial resident texture feature from a fence callback */ struct amdgpu_prt_cb { … }; /** * struct amdgpu_vm_tlb_seq_struct - Helper to increment the TLB flush sequence */ struct amdgpu_vm_tlb_seq_struct { … }; /** * amdgpu_vm_set_pasid - manage pasid and vm ptr mapping * * @adev: amdgpu_device pointer * @vm: amdgpu_vm pointer * @pasid: the pasid the VM is using on this GPU * * Set the pasid this VM is using on this GPU, can also be used to remove the * pasid by passing in zero. * */ int amdgpu_vm_set_pasid(struct amdgpu_device *adev, struct amdgpu_vm *vm, u32 pasid) { … } /** * amdgpu_vm_bo_evicted - vm_bo is evicted * * @vm_bo: vm_bo which is evicted * * State for PDs/PTs and per VM BOs which are not at the location they should * be. */ static void amdgpu_vm_bo_evicted(struct amdgpu_vm_bo_base *vm_bo) { … } /** * amdgpu_vm_bo_moved - vm_bo is moved * * @vm_bo: vm_bo which is moved * * State for per VM BOs which are moved, but that change is not yet reflected * in the page tables. */ static void amdgpu_vm_bo_moved(struct amdgpu_vm_bo_base *vm_bo) { … } /** * amdgpu_vm_bo_idle - vm_bo is idle * * @vm_bo: vm_bo which is now idle * * State for PDs/PTs and per VM BOs which have gone through the state machine * and are now idle. */ static void amdgpu_vm_bo_idle(struct amdgpu_vm_bo_base *vm_bo) { … } /** * amdgpu_vm_bo_invalidated - vm_bo is invalidated * * @vm_bo: vm_bo which is now invalidated * * State for normal BOs which are invalidated and that change not yet reflected * in the PTs. */ static void amdgpu_vm_bo_invalidated(struct amdgpu_vm_bo_base *vm_bo) { … } /** * amdgpu_vm_bo_evicted_user - vm_bo is evicted * * @vm_bo: vm_bo which is evicted * * State for BOs used by user mode queues which are not at the location they * should be. */ static void amdgpu_vm_bo_evicted_user(struct amdgpu_vm_bo_base *vm_bo) { … } /** * amdgpu_vm_bo_relocated - vm_bo is reloacted * * @vm_bo: vm_bo which is relocated * * State for PDs/PTs which needs to update their parent PD. * For the root PD, just move to idle state. */ static void amdgpu_vm_bo_relocated(struct amdgpu_vm_bo_base *vm_bo) { … } /** * amdgpu_vm_bo_done - vm_bo is done * * @vm_bo: vm_bo which is now done * * State for normal BOs which are invalidated and that change has been updated * in the PTs. */ static void amdgpu_vm_bo_done(struct amdgpu_vm_bo_base *vm_bo) { … } /** * amdgpu_vm_bo_reset_state_machine - reset the vm_bo state machine * @vm: the VM which state machine to reset * * Move all vm_bo object in the VM into a state where they will be updated * again during validation. */ static void amdgpu_vm_bo_reset_state_machine(struct amdgpu_vm *vm) { … } /** * amdgpu_vm_bo_base_init - Adds bo to the list of bos associated with the vm * * @base: base structure for tracking BO usage in a VM * @vm: vm to which bo is to be added * @bo: amdgpu buffer object * * Initialize a bo_va_base structure and add it to the appropriate lists * */ void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, struct amdgpu_vm *vm, struct amdgpu_bo *bo) { … } /** * amdgpu_vm_lock_pd - lock PD in drm_exec * * @vm: vm providing the BOs * @exec: drm execution context * @num_fences: number of extra fences to reserve * * Lock the VM root PD in the DRM execution context. */ int amdgpu_vm_lock_pd(struct amdgpu_vm *vm, struct drm_exec *exec, unsigned int num_fences) { … } /** * amdgpu_vm_move_to_lru_tail - move all BOs to the end of LRU * * @adev: amdgpu device pointer * @vm: vm providing the BOs * * Move all BOs to the end of LRU and remember their positions to put them * together. */ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, struct amdgpu_vm *vm) { … } /* Create scheduler entities for page table updates */ static int amdgpu_vm_init_entities(struct amdgpu_device *adev, struct amdgpu_vm *vm) { … } /* Destroy the entities for page table updates again */ static void amdgpu_vm_fini_entities(struct amdgpu_vm *vm) { … } /** * amdgpu_vm_generation - return the page table re-generation counter * @adev: the amdgpu_device * @vm: optional VM to check, might be NULL * * Returns a page table re-generation token to allow checking if submissions * are still valid to use this VM. The VM parameter might be NULL in which case * just the VRAM lost counter will be used. */ uint64_t amdgpu_vm_generation(struct amdgpu_device *adev, struct amdgpu_vm *vm) { … } /** * amdgpu_vm_validate - validate evicted BOs tracked in the VM * * @adev: amdgpu device pointer * @vm: vm providing the BOs * @ticket: optional reservation ticket used to reserve the VM * @validate: callback to do the validation * @param: parameter for the validation callback * * Validate the page table BOs and per-VM BOs on command submission if * necessary. If a ticket is given, also try to validate evicted user queue * BOs. They must already be reserved with the given ticket. * * Returns: * Validation result. */ int amdgpu_vm_validate(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket, int (*validate)(void *p, struct amdgpu_bo *bo), void *param) { … } /** * amdgpu_vm_ready - check VM is ready for updates * * @vm: VM to check * * Check if all VM PDs/PTs are ready for updates * * Returns: * True if VM is not evicting. */ bool amdgpu_vm_ready(struct amdgpu_vm *vm) { … } /** * amdgpu_vm_check_compute_bug - check whether asic has compute vm bug * * @adev: amdgpu_device pointer */ void amdgpu_vm_check_compute_bug(struct amdgpu_device *adev) { … } /** * amdgpu_vm_need_pipeline_sync - Check if pipe sync is needed for job. * * @ring: ring on which the job will be submitted * @job: job to submit * * Returns: * True if sync is needed. */ bool amdgpu_vm_need_pipeline_sync(struct amdgpu_ring *ring, struct amdgpu_job *job) { … } /** * amdgpu_vm_flush - hardware flush the vm * * @ring: ring to use for flush * @job: related job * @need_pipe_sync: is pipe sync needed * * Emit a VM flush when it is necessary. * * Returns: * 0 on success, errno otherwise. */ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job, bool need_pipe_sync) { … } /** * amdgpu_vm_bo_find - find the bo_va for a specific vm & bo * * @vm: requested vm * @bo: requested buffer object * * Find @bo inside the requested vm. * Search inside the @bos vm list for the requested vm * Returns the found bo_va or NULL if none is found * * Object has to be reserved! * * Returns: * Found bo_va or NULL. */ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm, struct amdgpu_bo *bo) { … } /** * amdgpu_vm_map_gart - Resolve gart mapping of addr * * @pages_addr: optional DMA address to use for lookup * @addr: the unmapped addr * * Look up the physical address of the page that the pte resolves * to. * * Returns: * The pointer for the page table entry. */ uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr) { … } /** * amdgpu_vm_update_pdes - make sure that all directories are valid * * @adev: amdgpu_device pointer * @vm: requested vm * @immediate: submit immediately to the paging queue * * Makes sure all directories are up to date. * * Returns: * 0 for success, error for failure. */ int amdgpu_vm_update_pdes(struct amdgpu_device *adev, struct amdgpu_vm *vm, bool immediate) { … } /** * amdgpu_vm_tlb_seq_cb - make sure to increment tlb sequence * @fence: unused * @cb: the callback structure * * Increments the tlb sequence to make sure that future CS execute a VM flush. */ static void amdgpu_vm_tlb_seq_cb(struct dma_fence *fence, struct dma_fence_cb *cb) { … } /** * amdgpu_vm_tlb_flush - prepare TLB flush * * @params: parameters for update * @fence: input fence to sync TLB flush with * @tlb_cb: the callback structure * * Increments the tlb sequence to make sure that future CS execute a VM flush. */ static void amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params, struct dma_fence **fence, struct amdgpu_vm_tlb_seq_struct *tlb_cb) { … } /** * amdgpu_vm_update_range - update a range in the vm page table * * @adev: amdgpu_device pointer to use for commands * @vm: the VM to update the range * @immediate: immediate submission in a page fault * @unlocked: unlocked invalidation during MM callback * @flush_tlb: trigger tlb invalidation after update completed * @allow_override: change MTYPE for local NUMA nodes * @resv: fences we need to sync to * @start: start of mapped range * @last: last mapped entry * @flags: flags for the entries * @offset: offset into nodes and pages_addr * @vram_base: base for vram mappings * @res: ttm_resource to map * @pages_addr: DMA addresses to use for mapping * @fence: optional resulting fence * * Fill in the page table entries between @start and @last. * * Returns: * 0 for success, negative erro code for failure. */ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm, bool immediate, bool unlocked, bool flush_tlb, bool allow_override, struct dma_resv *resv, uint64_t start, uint64_t last, uint64_t flags, uint64_t offset, uint64_t vram_base, struct ttm_resource *res, dma_addr_t *pages_addr, struct dma_fence **fence) { … } static void amdgpu_vm_bo_get_memory(struct amdgpu_bo_va *bo_va, struct amdgpu_mem_stats *stats) { … } void amdgpu_vm_get_memory(struct amdgpu_vm *vm, struct amdgpu_mem_stats *stats) { … } /** * amdgpu_vm_bo_update - update all BO mappings in the vm page table * * @adev: amdgpu_device pointer * @bo_va: requested BO and VM object * @clear: if true clear the entries * * Fill in the page table entries for @bo_va. * * Returns: * 0 for success, -EINVAL for failure. */ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, bool clear) { … } /** * amdgpu_vm_update_prt_state - update the global PRT state * * @adev: amdgpu_device pointer */ static void amdgpu_vm_update_prt_state(struct amdgpu_device *adev) { … } /** * amdgpu_vm_prt_get - add a PRT user * * @adev: amdgpu_device pointer */ static void amdgpu_vm_prt_get(struct amdgpu_device *adev) { … } /** * amdgpu_vm_prt_put - drop a PRT user * * @adev: amdgpu_device pointer */ static void amdgpu_vm_prt_put(struct amdgpu_device *adev) { … } /** * amdgpu_vm_prt_cb - callback for updating the PRT status * * @fence: fence for the callback * @_cb: the callback function */ static void amdgpu_vm_prt_cb(struct dma_fence *fence, struct dma_fence_cb *_cb) { … } /** * amdgpu_vm_add_prt_cb - add callback for updating the PRT status * * @adev: amdgpu_device pointer * @fence: fence for the callback */ static void amdgpu_vm_add_prt_cb(struct amdgpu_device *adev, struct dma_fence *fence) { … } /** * amdgpu_vm_free_mapping - free a mapping * * @adev: amdgpu_device pointer * @vm: requested vm * @mapping: mapping to be freed * @fence: fence of the unmap operation * * Free a mapping and make sure we decrease the PRT usage count if applicable. */ static void amdgpu_vm_free_mapping(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct amdgpu_bo_va_mapping *mapping, struct dma_fence *fence) { … } /** * amdgpu_vm_prt_fini - finish all prt mappings * * @adev: amdgpu_device pointer * @vm: requested vm * * Register a cleanup callback to disable PRT support after VM dies. */ static void amdgpu_vm_prt_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm) { … } /** * amdgpu_vm_clear_freed - clear freed BOs in the PT * * @adev: amdgpu_device pointer * @vm: requested vm * @fence: optional resulting fence (unchanged if no work needed to be done * or if an error occurred) * * Make sure all freed BOs are cleared in the PT. * PTs have to be reserved and mutex must be locked! * * Returns: * 0 for success. * */ int amdgpu_vm_clear_freed(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct dma_fence **fence) { … } /** * amdgpu_vm_handle_moved - handle moved BOs in the PT * * @adev: amdgpu_device pointer * @vm: requested vm * @ticket: optional reservation ticket used to reserve the VM * * Make sure all BOs which are moved are updated in the PTs. * * Returns: * 0 for success. * * PTs have to be reserved! */ int amdgpu_vm_handle_moved(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket) { … } /** * amdgpu_vm_flush_compute_tlb - Flush TLB on compute VM * * @adev: amdgpu_device pointer * @vm: requested vm * @flush_type: flush type * @xcc_mask: mask of XCCs that belong to the compute partition in need of a TLB flush. * * Flush TLB if needed for a compute VM. * * Returns: * 0 for success. */ int amdgpu_vm_flush_compute_tlb(struct amdgpu_device *adev, struct amdgpu_vm *vm, uint32_t flush_type, uint32_t xcc_mask) { … } /** * amdgpu_vm_bo_add - add a bo to a specific vm * * @adev: amdgpu_device pointer * @vm: requested vm * @bo: amdgpu buffer object * * Add @bo into the requested vm. * Add @bo to the list of bos associated with the vm * * Returns: * Newly added bo_va or NULL for failure * * Object has to be reserved! */ struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct amdgpu_bo *bo) { … } /** * amdgpu_vm_bo_insert_map - insert a new mapping * * @adev: amdgpu_device pointer * @bo_va: bo_va to store the address * @mapping: the mapping to insert * * Insert a new mapping into all structures. */ static void amdgpu_vm_bo_insert_map(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, struct amdgpu_bo_va_mapping *mapping) { … } /* Validate operation parameters to prevent potential abuse */ static int amdgpu_vm_verify_parameters(struct amdgpu_device *adev, struct amdgpu_bo *bo, uint64_t saddr, uint64_t offset, uint64_t size) { … } /** * amdgpu_vm_bo_map - map bo inside a vm * * @adev: amdgpu_device pointer * @bo_va: bo_va to store the address * @saddr: where to map the BO * @offset: requested offset in the BO * @size: BO size in bytes * @flags: attributes of pages (read/write/valid/etc.) * * Add a mapping of the BO at the specefied addr into the VM. * * Returns: * 0 for success, error for failure. * * Object has to be reserved and unreserved outside! */ int amdgpu_vm_bo_map(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint64_t flags) { … } /** * amdgpu_vm_bo_replace_map - map bo inside a vm, replacing existing mappings * * @adev: amdgpu_device pointer * @bo_va: bo_va to store the address * @saddr: where to map the BO * @offset: requested offset in the BO * @size: BO size in bytes * @flags: attributes of pages (read/write/valid/etc.) * * Add a mapping of the BO at the specefied addr into the VM. Replace existing * mappings as we do so. * * Returns: * 0 for success, error for failure. * * Object has to be reserved and unreserved outside! */ int amdgpu_vm_bo_replace_map(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr, uint64_t offset, uint64_t size, uint64_t flags) { … } /** * amdgpu_vm_bo_unmap - remove bo mapping from vm * * @adev: amdgpu_device pointer * @bo_va: bo_va to remove the address from * @saddr: where to the BO is mapped * * Remove a mapping of the BO at the specefied addr from the VM. * * Returns: * 0 for success, error for failure. * * Object has to be reserved and unreserved outside! */ int amdgpu_vm_bo_unmap(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va, uint64_t saddr) { … } /** * amdgpu_vm_bo_clear_mappings - remove all mappings in a specific range * * @adev: amdgpu_device pointer * @vm: VM structure to use * @saddr: start of the range * @size: size of the range * * Remove all mappings in a range, split them as appropriate. * * Returns: * 0 for success, error for failure. */ int amdgpu_vm_bo_clear_mappings(struct amdgpu_device *adev, struct amdgpu_vm *vm, uint64_t saddr, uint64_t size) { … } /** * amdgpu_vm_bo_lookup_mapping - find mapping by address * * @vm: the requested VM * @addr: the address * * Find a mapping by it's address. * * Returns: * The amdgpu_bo_va_mapping matching for addr or NULL * */ struct amdgpu_bo_va_mapping *amdgpu_vm_bo_lookup_mapping(struct amdgpu_vm *vm, uint64_t addr) { … } /** * amdgpu_vm_bo_trace_cs - trace all reserved mappings * * @vm: the requested vm * @ticket: CS ticket * * Trace all mappings of BOs reserved during a command submission. */ void amdgpu_vm_bo_trace_cs(struct amdgpu_vm *vm, struct ww_acquire_ctx *ticket) { … } /** * amdgpu_vm_bo_del - remove a bo from a specific vm * * @adev: amdgpu_device pointer * @bo_va: requested bo_va * * Remove @bo_va->bo from the requested vm. * * Object have to be reserved! */ void amdgpu_vm_bo_del(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va) { … } /** * amdgpu_vm_evictable - check if we can evict a VM * * @bo: A page table of the VM. * * Check if it is possible to evict a VM. */ bool amdgpu_vm_evictable(struct amdgpu_bo *bo) { … } /** * amdgpu_vm_bo_invalidate - mark the bo as invalid * * @adev: amdgpu_device pointer * @bo: amdgpu buffer object * @evicted: is the BO evicted * * Mark @bo as invalid. */ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev, struct amdgpu_bo *bo, bool evicted) { … } /** * amdgpu_vm_get_block_size - calculate VM page table size as power of two * * @vm_size: VM size * * Returns: * VM page table as power of two */ static uint32_t amdgpu_vm_get_block_size(uint64_t vm_size) { … } /** * amdgpu_vm_adjust_size - adjust vm size, block size and fragment size * * @adev: amdgpu_device pointer * @min_vm_size: the minimum vm size in GB if it's set auto * @fragment_size_default: Default PTE fragment size * @max_level: max VMPT level * @max_bits: max address space size in bits * */ void amdgpu_vm_adjust_size(struct amdgpu_device *adev, uint32_t min_vm_size, uint32_t fragment_size_default, unsigned max_level, unsigned max_bits) { … } /** * amdgpu_vm_wait_idle - wait for the VM to become idle * * @vm: VM object to wait for * @timeout: timeout to wait for VM to become idle */ long amdgpu_vm_wait_idle(struct amdgpu_vm *vm, long timeout) { … } static void amdgpu_vm_destroy_task_info(struct kref *kref) { … } static inline struct amdgpu_vm * amdgpu_vm_get_vm_from_pasid(struct amdgpu_device *adev, u32 pasid) { … } /** * amdgpu_vm_put_task_info - reference down the vm task_info ptr * * @task_info: task_info struct under discussion. * * frees the vm task_info ptr at the last put */ void amdgpu_vm_put_task_info(struct amdgpu_task_info *task_info) { … } /** * amdgpu_vm_get_task_info_vm - Extracts task info for a vm. * * @vm: VM to get info from * * Returns the reference counted task_info structure, which must be * referenced down with amdgpu_vm_put_task_info. */ struct amdgpu_task_info * amdgpu_vm_get_task_info_vm(struct amdgpu_vm *vm) { … } /** * amdgpu_vm_get_task_info_pasid - Extracts task info for a PASID. * * @adev: drm device pointer * @pasid: PASID identifier for VM * * Returns the reference counted task_info structure, which must be * referenced down with amdgpu_vm_put_task_info. */ struct amdgpu_task_info * amdgpu_vm_get_task_info_pasid(struct amdgpu_device *adev, u32 pasid) { … } static int amdgpu_vm_create_task_info(struct amdgpu_vm *vm) { … } /** * amdgpu_vm_set_task_info - Sets VMs task info. * * @vm: vm for which to set the info */ void amdgpu_vm_set_task_info(struct amdgpu_vm *vm) { … } /** * amdgpu_vm_init - initialize a vm instance * * @adev: amdgpu_device pointer * @vm: requested vm * @xcp_id: GPU partition selection id * * Init @vm fields. * * Returns: * 0 for success, error for failure. */ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, int32_t xcp_id) { … } /** * amdgpu_vm_make_compute - Turn a GFX VM into a compute VM * * @adev: amdgpu_device pointer * @vm: requested vm * * This only works on GFX VMs that don't have any BOs added and no * page tables allocated yet. * * Changes the following VM parameters: * - use_cpu_for_update * - pte_supports_ats * * Reinitializes the page directory to reflect the changed ATS * setting. * * Returns: * 0 for success, -errno for errors. */ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm) { … } /** * amdgpu_vm_release_compute - release a compute vm * @adev: amdgpu_device pointer * @vm: a vm turned into compute vm by calling amdgpu_vm_make_compute * * This is a correspondant of amdgpu_vm_make_compute. It decouples compute * pasid from vm. Compute should stop use of vm after this call. */ void amdgpu_vm_release_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm) { … } /** * amdgpu_vm_fini - tear down a vm instance * * @adev: amdgpu_device pointer * @vm: requested vm * * Tear down @vm. * Unbind the VM and remove all bos from the vm bo list */ void amdgpu_vm_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm) { … } /** * amdgpu_vm_manager_init - init the VM manager * * @adev: amdgpu_device pointer * * Initialize the VM manager structures */ void amdgpu_vm_manager_init(struct amdgpu_device *adev) { … } /** * amdgpu_vm_manager_fini - cleanup VM manager * * @adev: amdgpu_device pointer * * Cleanup the VM manager and free resources. */ void amdgpu_vm_manager_fini(struct amdgpu_device *adev) { … } /** * amdgpu_vm_ioctl - Manages VMID reservation for vm hubs. * * @dev: drm device pointer * @data: drm_amdgpu_vm * @filp: drm file pointer * * Returns: * 0 for success, -errno for errors. */ int amdgpu_vm_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { … } /** * amdgpu_vm_handle_fault - graceful handling of VM faults. * @adev: amdgpu device pointer * @pasid: PASID of the VM * @vmid: VMID, only used for GFX 9.4.3. * @node_id: Node_id received in IH cookie. Only applicable for * GFX 9.4.3. * @addr: Address of the fault * @write_fault: true is write fault, false is read fault * * Try to gracefully handle a VM fault. Return true if the fault was handled and * shouldn't be reported any more. */ bool amdgpu_vm_handle_fault(struct amdgpu_device *adev, u32 pasid, u32 vmid, u32 node_id, uint64_t addr, bool write_fault) { … } #if defined(CONFIG_DEBUG_FS) /** * amdgpu_debugfs_vm_bo_info - print BO info for the VM * * @vm: Requested VM for printing BO info * @m: debugfs file * * Print BO information in debugfs file for the VM */ void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m) { … } #endif /** * amdgpu_vm_update_fault_cache - update cached fault into. * @adev: amdgpu device pointer * @pasid: PASID of the VM * @addr: Address of the fault * @status: GPUVM fault status register * @vmhub: which vmhub got the fault * * Cache the fault info for later use by userspace in debugging. */ void amdgpu_vm_update_fault_cache(struct amdgpu_device *adev, unsigned int pasid, uint64_t addr, uint32_t status, unsigned int vmhub) { … } /** * amdgpu_vm_is_bo_always_valid - check if the BO is VM always valid * * @vm: VM to test against. * @bo: BO to be tested. * * Returns true if the BO shares the dma_resv object with the root PD and is * always guaranteed to be valid inside the VM. */ bool amdgpu_vm_is_bo_always_valid(struct amdgpu_vm *vm, struct amdgpu_bo *bo) { … }
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