#include <linux/slab.h>
#include <drm/drm_print.h>
#include "amdgpu_ring_mux.h"
#include "amdgpu_ring.h"
#include "amdgpu.h"
#define AMDGPU_MUX_RESUBMIT_JIFFIES_TIMEOUT …
#define AMDGPU_MAX_LAST_UNSIGNALED_THRESHOLD_US …
static const struct ring_info { … } sw_ring_info[] = …;
static struct kmem_cache *amdgpu_mux_chunk_slab;
static inline struct amdgpu_mux_entry *amdgpu_ring_mux_sw_entry(struct amdgpu_ring_mux *mux,
struct amdgpu_ring *ring)
{ … }
static void amdgpu_ring_mux_copy_pkt_from_sw_ring(struct amdgpu_ring_mux *mux,
struct amdgpu_ring *ring,
u64 s_start, u64 s_end)
{ … }
static void amdgpu_mux_resubmit_chunks(struct amdgpu_ring_mux *mux)
{ … }
static void amdgpu_ring_mux_schedule_resubmit(struct amdgpu_ring_mux *mux)
{ … }
static void amdgpu_mux_resubmit_fallback(struct timer_list *t)
{ … }
int amdgpu_ring_mux_init(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring,
unsigned int entry_size)
{ … }
void amdgpu_ring_mux_fini(struct amdgpu_ring_mux *mux)
{ … }
int amdgpu_ring_mux_add_sw_ring(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring)
{ … }
void amdgpu_ring_mux_set_wptr(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring, u64 wptr)
{ … }
u64 amdgpu_ring_mux_get_wptr(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring)
{ … }
u64 amdgpu_ring_mux_get_rptr(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring)
{ … }
u64 amdgpu_sw_ring_get_rptr_gfx(struct amdgpu_ring *ring)
{ … }
u64 amdgpu_sw_ring_get_wptr_gfx(struct amdgpu_ring *ring)
{ … }
void amdgpu_sw_ring_set_wptr_gfx(struct amdgpu_ring *ring)
{ … }
void amdgpu_sw_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count)
{ … }
const char *amdgpu_sw_ring_name(int idx)
{ … }
unsigned int amdgpu_sw_ring_priority(int idx)
{ … }
static int amdgpu_mcbp_scan(struct amdgpu_ring_mux *mux)
{ … }
static int amdgpu_mcbp_trigger_preempt(struct amdgpu_ring_mux *mux)
{ … }
void amdgpu_sw_ring_ib_begin(struct amdgpu_ring *ring)
{ … }
void amdgpu_sw_ring_ib_end(struct amdgpu_ring *ring)
{ … }
void amdgpu_sw_ring_ib_mark_offset(struct amdgpu_ring *ring, enum amdgpu_ring_mux_offset_type type)
{ … }
void amdgpu_ring_mux_start_ib(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring)
{ … }
static void scan_and_remove_signaled_chunk(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring)
{ … }
void amdgpu_ring_mux_ib_mark_offset(struct amdgpu_ring_mux *mux,
struct amdgpu_ring *ring, u64 offset,
enum amdgpu_ring_mux_offset_type type)
{ … }
void amdgpu_ring_mux_end_ib(struct amdgpu_ring_mux *mux, struct amdgpu_ring *ring)
{ … }
bool amdgpu_mcbp_handle_trailing_fence_irq(struct amdgpu_ring_mux *mux)
{ … }