// SPDX-License-Identifier: MIT /* * Copyright 2023 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #include "amdgpu.h" #include "amdgpu_seq64.h" #include <drm/drm_exec.h> /** * DOC: amdgpu_seq64 * * amdgpu_seq64 allocates a 64bit memory on each request in sequence order. * seq64 driver is required for user queue fence memory allocation, TLB * counters and VM updates. It has maximum count of 32768 64 bit slots. */ /** * amdgpu_seq64_get_va_base - Get the seq64 va base address * * @adev: amdgpu_device pointer * * Returns: * va base address on success */ static inline u64 amdgpu_seq64_get_va_base(struct amdgpu_device *adev) { … } /** * amdgpu_seq64_map - Map the seq64 memory to VM * * @adev: amdgpu_device pointer * @vm: vm pointer * @bo_va: bo_va pointer * * Map the seq64 memory to the given VM. * * Returns: * 0 on success or a negative error code on failure */ int amdgpu_seq64_map(struct amdgpu_device *adev, struct amdgpu_vm *vm, struct amdgpu_bo_va **bo_va) { … } /** * amdgpu_seq64_unmap - Unmap the seq64 memory * * @adev: amdgpu_device pointer * @fpriv: DRM file private * * Unmap the seq64 memory from the given VM. */ void amdgpu_seq64_unmap(struct amdgpu_device *adev, struct amdgpu_fpriv *fpriv) { … } /** * amdgpu_seq64_alloc - Allocate a 64 bit memory * * @adev: amdgpu_device pointer * @va: VA to access the seq in process address space * @cpu_addr: CPU address to access the seq * * Alloc a 64 bit memory from seq64 pool. * * Returns: * 0 on success or a negative error code on failure */ int amdgpu_seq64_alloc(struct amdgpu_device *adev, u64 *va, u64 **cpu_addr) { … } /** * amdgpu_seq64_free - Free the given 64 bit memory * * @adev: amdgpu_device pointer * @va: gpu start address to be freed * * Free the given 64 bit memory from seq64 pool. */ void amdgpu_seq64_free(struct amdgpu_device *adev, u64 va) { … } /** * amdgpu_seq64_fini - Cleanup seq64 driver * * @adev: amdgpu_device pointer * * Free the memory space allocated for seq64. * */ void amdgpu_seq64_fini(struct amdgpu_device *adev) { … } /** * amdgpu_seq64_init - Initialize seq64 driver * * @adev: amdgpu_device pointer * * Allocate the required memory space for seq64. * * Returns: * 0 on success or a negative error code on failure */ int amdgpu_seq64_init(struct amdgpu_device *adev) { … }