/* * Copyright 2018 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #include <linux/firmware.h> #include "amdgpu.h" #include "amdgpu_discovery.h" #include "soc15_hw_ip.h" #include "discovery.h" #include "amdgpu_ras.h" #include "soc15.h" #include "gfx_v9_0.h" #include "gfx_v9_4_3.h" #include "gmc_v9_0.h" #include "df_v1_7.h" #include "df_v3_6.h" #include "df_v4_3.h" #include "df_v4_6_2.h" #include "df_v4_15.h" #include "nbio_v6_1.h" #include "nbio_v7_0.h" #include "nbio_v7_4.h" #include "nbio_v7_9.h" #include "nbio_v7_11.h" #include "hdp_v4_0.h" #include "vega10_ih.h" #include "vega20_ih.h" #include "sdma_v4_0.h" #include "sdma_v4_4_2.h" #include "uvd_v7_0.h" #include "vce_v4_0.h" #include "vcn_v1_0.h" #include "vcn_v2_5.h" #include "jpeg_v2_5.h" #include "smuio_v9_0.h" #include "gmc_v10_0.h" #include "gmc_v11_0.h" #include "gmc_v12_0.h" #include "gfxhub_v2_0.h" #include "mmhub_v2_0.h" #include "nbio_v2_3.h" #include "nbio_v4_3.h" #include "nbio_v7_2.h" #include "nbio_v7_7.h" #include "nbif_v6_3_1.h" #include "hdp_v5_0.h" #include "hdp_v5_2.h" #include "hdp_v6_0.h" #include "hdp_v7_0.h" #include "nv.h" #include "soc21.h" #include "soc24.h" #include "navi10_ih.h" #include "ih_v6_0.h" #include "ih_v6_1.h" #include "ih_v7_0.h" #include "gfx_v10_0.h" #include "gfx_v11_0.h" #include "gfx_v12_0.h" #include "sdma_v5_0.h" #include "sdma_v5_2.h" #include "sdma_v6_0.h" #include "sdma_v7_0.h" #include "lsdma_v6_0.h" #include "lsdma_v7_0.h" #include "vcn_v2_0.h" #include "jpeg_v2_0.h" #include "vcn_v3_0.h" #include "jpeg_v3_0.h" #include "vcn_v4_0.h" #include "jpeg_v4_0.h" #include "vcn_v4_0_3.h" #include "jpeg_v4_0_3.h" #include "vcn_v4_0_5.h" #include "jpeg_v4_0_5.h" #include "amdgpu_vkms.h" #include "mes_v11_0.h" #include "mes_v12_0.h" #include "smuio_v11_0.h" #include "smuio_v11_0_6.h" #include "smuio_v13_0.h" #include "smuio_v13_0_3.h" #include "smuio_v13_0_6.h" #include "smuio_v14_0_2.h" #include "vcn_v5_0_0.h" #include "jpeg_v5_0_0.h" #include "amdgpu_vpe.h" #if defined(CONFIG_DRM_AMD_ISP) #include "amdgpu_isp.h" #endif #define FIRMWARE_IP_DISCOVERY … MODULE_FIRMWARE(…); #define mmIP_DISCOVERY_VERSION … #define mmRCC_CONFIG_MEMSIZE … #define mmMP0_SMN_C2PMSG_33 … #define mmMM_INDEX … #define mmMM_INDEX_HI … #define mmMM_DATA … static const char *hw_id_names[HW_ID_MAX] = …; static int hw_id_map[MAX_HWIP] = …; static int amdgpu_discovery_read_binary_from_sysmem(struct amdgpu_device *adev, uint8_t *binary) { … } #define IP_DISCOVERY_V2 … #define IP_DISCOVERY_V4 … static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, uint8_t *binary) { … } static int amdgpu_discovery_read_binary_from_file(struct amdgpu_device *adev, uint8_t *binary) { … } static uint16_t amdgpu_discovery_calculate_checksum(uint8_t *data, uint32_t size) { … } static inline bool amdgpu_discovery_verify_checksum(uint8_t *data, uint32_t size, uint16_t expected) { … } static inline bool amdgpu_discovery_verify_binary_signature(uint8_t *binary) { … } static void amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev) { … } static int amdgpu_discovery_verify_npsinfo(struct amdgpu_device *adev, struct binary_header *bhdr) { … } static int amdgpu_discovery_init(struct amdgpu_device *adev) { … } static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev); void amdgpu_discovery_fini(struct amdgpu_device *adev) { … } static int amdgpu_discovery_validate_ip(const struct ip_v4 *ip) { … } static void amdgpu_discovery_read_harvest_bit_per_ip(struct amdgpu_device *adev, uint32_t *vcn_harvest_count) { … } static void amdgpu_discovery_read_from_harvest_table(struct amdgpu_device *adev, uint32_t *vcn_harvest_count, uint32_t *umc_harvest_count) { … } /* ================================================== */ struct ip_hw_instance { … }; struct ip_hw_id { … }; struct ip_die_entry { … }; /* -------------------------------------------------- */ struct ip_hw_instance_attr { … }; static ssize_t hw_id_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static ssize_t num_instance_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static ssize_t major_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static ssize_t minor_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static ssize_t revision_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static ssize_t harvest_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static ssize_t num_base_addresses_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static ssize_t base_addr_show(struct ip_hw_instance *ip_hw_instance, char *buf) { … } static struct ip_hw_instance_attr ip_hw_attr[] = …; static struct attribute *ip_hw_instance_attrs[ARRAY_SIZE(ip_hw_attr) + 1]; ATTRIBUTE_GROUPS(…); #define to_ip_hw_instance(x) … #define to_ip_hw_instance_attr(x) … static ssize_t ip_hw_instance_attr_show(struct kobject *kobj, struct attribute *attr, char *buf) { … } static const struct sysfs_ops ip_hw_instance_sysfs_ops = …; static void ip_hw_instance_release(struct kobject *kobj) { … } static const struct kobj_type ip_hw_instance_ktype = …; /* -------------------------------------------------- */ #define to_ip_hw_id(x) … static void ip_hw_id_release(struct kobject *kobj) { … } static const struct kobj_type ip_hw_id_ktype = …; /* -------------------------------------------------- */ static void die_kobj_release(struct kobject *kobj); static void ip_disc_release(struct kobject *kobj); struct ip_die_entry_attribute { … }; #define to_ip_die_entry_attr(x) … static ssize_t num_ips_show(struct ip_die_entry *ip_die_entry, char *buf) { … } /* If there are more ip_die_entry attrs, other than the number of IPs, * we can make this intro an array of attrs, and then initialize * ip_die_entry_attrs in a loop. */ static struct ip_die_entry_attribute num_ips_attr = …; static struct attribute *ip_die_entry_attrs[] = …; ATTRIBUTE_GROUPS(…); /* ip_die_entry_groups */ #define to_ip_die_entry(x) … static ssize_t ip_die_entry_attr_show(struct kobject *kobj, struct attribute *attr, char *buf) { … } static void ip_die_entry_release(struct kobject *kobj) { … } static const struct sysfs_ops ip_die_entry_sysfs_ops = …; static const struct kobj_type ip_die_entry_ktype = …; static const struct kobj_type die_kobj_ktype = …; static const struct kobj_type ip_discovery_ktype = …; struct ip_discovery_top { … }; static void die_kobj_release(struct kobject *kobj) { … } static void ip_disc_release(struct kobject *kobj) { … } static uint8_t amdgpu_discovery_get_harvest_info(struct amdgpu_device *adev, uint16_t hw_id, uint8_t inst) { … } static int amdgpu_discovery_sysfs_ips(struct amdgpu_device *adev, struct ip_die_entry *ip_die_entry, const size_t _ip_offset, const int num_ips, bool reg_base_64) { … } static int amdgpu_discovery_sysfs_recurse(struct amdgpu_device *adev) { … } static int amdgpu_discovery_sysfs_init(struct amdgpu_device *adev) { … } /* -------------------------------------------------- */ #define list_to_kobj(el) … static void amdgpu_discovery_sysfs_ip_hw_free(struct ip_hw_id *ip_hw_id) { … } static void amdgpu_discovery_sysfs_die_free(struct ip_die_entry *ip_die_entry) { … } static void amdgpu_discovery_sysfs_fini(struct amdgpu_device *adev) { … } /* ================================================== */ static int amdgpu_discovery_reg_base_init(struct amdgpu_device *adev) { … } static void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev) { … } gc_info; static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) { … } mall_info; static int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) { … } vcn_info; static int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev) { … } nps_info; int amdgpu_discovery_get_nps_info(struct amdgpu_device *adev, uint32_t *nps_type, struct amdgpu_gmc_memrange **ranges, int *range_cnt) { … } static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_ih_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_psp_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev) { … } #if defined(CONFIG_DRM_AMD_DC) static void amdgpu_discovery_set_sriov_display(struct amdgpu_device *adev) { … } #endif static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_sdma_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_mm_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev) { … } static void amdgpu_discovery_init_soc_config(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_vpe_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_umsch_mm_ip_blocks(struct amdgpu_device *adev) { … } static int amdgpu_discovery_set_isp_ip_blocks(struct amdgpu_device *adev) { … } int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev) { … }
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