/* * Copyright 2019 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #include <linux/perf_event.h> #include <linux/init.h> #include "amdgpu.h" #include "amdgpu_pmu.h" #define PMU_NAME_SIZE … #define NUM_FORMATS_AMDGPU_PMU … #define NUM_FORMATS_DF_VEGA20 … #define NUM_EVENTS_DF_VEGA20 … #define NUM_EVENT_TYPES_VEGA20 … #define NUM_EVENTS_VEGA20_XGMI … #define NUM_EVENTS_VEGA20_MAX … #define NUM_EVENT_TYPES_ARCTURUS … #define NUM_EVENTS_ARCTURUS_XGMI … #define NUM_EVENTS_ARCTURUS_MAX … struct amdgpu_pmu_event_attribute { … }; /* record to keep track of pmu entry per pmu type per device */ struct amdgpu_pmu_entry { … }; static ssize_t amdgpu_pmu_event_show(struct device *dev, struct device_attribute *attr, char *buf) { … } static LIST_HEAD(amdgpu_pmu_list); struct amdgpu_pmu_attr { … }; struct amdgpu_pmu_type { … }; struct amdgpu_pmu_config { … }; /* * Events fall under two categories: * - PMU typed * Events in /sys/bus/event_source/devices/amdgpu_<pmu_type>_<dev_num> have * performance counter operations handled by one IP <pmu_type>. Formats and * events should be defined by <pmu_type>_<asic_type>_formats and * <pmu_type>_<asic_type>_events respectively. * * - Event config typed * Events in /sys/bus/event_source/devices/amdgpu_<dev_num> have performance * counter operations that can be handled by multiple IPs dictated by their * "type" format field. Formats and events should be defined by * amdgpu_pmu_formats and <asic_type>_events respectively. Format field * "type" is generated in amdgpu_pmu_event_show and defined in * <asic_type>_event_config_types. */ static struct amdgpu_pmu_attr amdgpu_pmu_formats[NUM_FORMATS_AMDGPU_PMU] = …; /* Vega20 events */ static struct amdgpu_pmu_attr vega20_events[NUM_EVENTS_VEGA20_MAX] = …; static struct amdgpu_pmu_type vega20_types[NUM_EVENT_TYPES_VEGA20] = …; static struct amdgpu_pmu_config vega20_config = …; /* Vega20 data fabric (DF) events */ static struct amdgpu_pmu_attr df_vega20_formats[NUM_FORMATS_DF_VEGA20] = …; static struct amdgpu_pmu_attr df_vega20_events[NUM_EVENTS_DF_VEGA20] = …; static struct amdgpu_pmu_config df_vega20_config = …; /* Arcturus events */ static struct amdgpu_pmu_attr arcturus_events[NUM_EVENTS_ARCTURUS_MAX] = …; static struct amdgpu_pmu_type arcturus_types[NUM_EVENT_TYPES_ARCTURUS] = …; static struct amdgpu_pmu_config arcturus_config = …; /* initialize perf counter */ static int amdgpu_perf_event_init(struct perf_event *event) { … } /* start perf counter */ static void amdgpu_perf_start(struct perf_event *event, int flags) { … } /* read perf counter */ static void amdgpu_perf_read(struct perf_event *event) { … } /* stop perf counter */ static void amdgpu_perf_stop(struct perf_event *event, int flags) { … } /* add perf counter */ static int amdgpu_perf_add(struct perf_event *event, int flags) { … } /* delete perf counter */ static void amdgpu_perf_del(struct perf_event *event, int flags) { … } static void amdgpu_pmu_create_event_attrs_by_type( struct attribute_group *attr_group, struct amdgpu_pmu_event_attribute *pmu_attr, struct amdgpu_pmu_attr events[], int s_offset, int e_offset, unsigned int type) { … } static void amdgpu_pmu_create_attrs(struct attribute_group *attr_group, struct amdgpu_pmu_event_attribute *pmu_attr, struct amdgpu_pmu_attr events[], int num_events) { … } static int amdgpu_pmu_alloc_pmu_attrs( struct attribute_group *fmt_attr_group, struct amdgpu_pmu_event_attribute **fmt_attr, struct attribute_group *evt_attr_group, struct amdgpu_pmu_event_attribute **evt_attr, struct amdgpu_pmu_config *config) { … } /* init pmu tracking per pmu type */ static int init_pmu_entry_by_type_and_add(struct amdgpu_pmu_entry *pmu_entry, struct amdgpu_pmu_config *config) { … } /* destroy all pmu data associated with target device */ void amdgpu_pmu_fini(struct amdgpu_device *adev) { … } static struct amdgpu_pmu_entry *create_pmu_entry(struct amdgpu_device *adev, unsigned int pmu_type, char *pmu_type_name, char *pmu_file_prefix) { … } /* init amdgpu_pmu */ int amdgpu_pmu_init(struct amdgpu_device *adev) { … }
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