/* * * Copyright (C) 2016 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included * in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #ifndef OSS_1_0_D_H #define OSS_1_0_D_H #define ixCLIENT0_BM … #define ixCLIENT0_CD0 … #define ixCLIENT0_CD1 … #define ixCLIENT0_CD2 … #define ixCLIENT0_CD3 … #define ixCLIENT0_CK0 … #define ixCLIENT0_CK1 … #define ixCLIENT0_CK2 … #define ixCLIENT0_CK3 … #define ixCLIENT0_K0 … #define ixCLIENT0_K1 … #define ixCLIENT0_K2 … #define ixCLIENT0_K3 … #define ixCLIENT0_OFFSET … #define ixCLIENT0_OFFSET_HI … #define ixCLIENT0_STATUS … #define ixCLIENT1_BM … #define ixCLIENT1_CD0 … #define ixCLIENT1_CD1 … #define ixCLIENT1_CD2 … #define ixCLIENT1_CD3 … #define ixCLIENT1_CK0 … #define ixCLIENT1_CK1 … #define ixCLIENT1_CK2 … #define ixCLIENT1_CK3 … #define ixCLIENT1_K0 … #define ixCLIENT1_K1 … #define ixCLIENT1_K2 … #define ixCLIENT1_K3 … #define ixCLIENT1_OFFSET … #define ixCLIENT1_OFFSET_HI … #define ixCLIENT1_PORT_STATUS … #define ixCLIENT2_BM … #define ixCLIENT2_CD0 … #define ixCLIENT2_CD1 … #define ixCLIENT2_CD2 … #define ixCLIENT2_CD3 … #define ixCLIENT2_CK0 … #define ixCLIENT2_CK1 … #define ixCLIENT2_CK2 … #define ixCLIENT2_CK3 … #define ixCLIENT2_K0 … #define ixCLIENT2_K1 … #define ixCLIENT2_K2 … #define ixCLIENT2_K3 … #define ixCLIENT2_OFFSET … #define ixCLIENT2_OFFSET_HI … #define ixCLIENT2_STATUS … #define ixCLIENT3_BM … #define ixCLIENT3_CD0 … #define ixCLIENT3_CD1 … #define ixCLIENT3_CD2 … #define ixCLIENT3_CD3 … #define ixCLIENT3_CK0 … #define ixCLIENT3_CK1 … #define ixCLIENT3_CK2 … #define ixCLIENT3_CK3 … #define ixCLIENT3_K0 … #define ixCLIENT3_K1 … #define ixCLIENT3_K2 … #define ixCLIENT3_K3 … #define ixCLIENT3_OFFSET … #define ixCLIENT3_OFFSET_HI … #define ixCLIENT3_STATUS … #define ixDH_TEST … #define ixEXP0 … #define ixEXP1 … #define ixEXP2 … #define ixEXP3 … #define ixEXP4 … #define ixEXP5 … #define ixEXP6 … #define ixEXP7 … #define ixHFS_SEED0 … #define ixHFS_SEED1 … #define ixHFS_SEED2 … #define ixHFS_SEED3 … #define ixKEFUSE0 … #define ixKEFUSE1 … #define ixKEFUSE2 … #define ixKEFUSE3 … #define ixKHFS0 … #define ixKHFS1 … #define ixKHFS2 … #define ixKHFS3 … #define ixKSESSION0 … #define ixKSESSION1 … #define ixKSESSION2 … #define ixKSESSION3 … #define ixKSIG0 … #define ixKSIG1 … #define ixKSIG2 … #define ixKSIG3 … #define ixLX0 … #define ixLX1 … #define ixLX2 … #define ixLX3 … #define ixRINGOSC_MASK … #define ixSPU_PORT_STATUS … #define mmCC_DRM_ID_STRAPS … #define mmCC_SYS_RB_BACKEND_DISABLE … #define mmCC_SYS_RB_REDUNDANCY … #define mmCGTT_DRM_CLK_CTRL0 … #define mmCP_CONFIG … #define mmDC_TEST_DEBUG_DATA … #define mmDC_TEST_DEBUG_INDEX … #define mmGC_USER_SYS_RB_BACKEND_DISABLE … #define mmHDP_ADDR_CONFIG … #define mmHDP_DEBUG0 … #define mmHDP_DEBUG1 … #define mmHDP_HOST_PATH_CNTL … #define mmHDP_LAST_SURFACE_HIT … #define mmHDP_MEMIO_ADDR … #define mmHDP_MEMIO_CNTL … #define mmHDP_MEMIO_RD_DATA … #define mmHDP_MEMIO_STATUS … #define mmHDP_MEMIO_WR_DATA … #define mmHDP_MEM_POWER_LS … #define mmHDP_MISC_CNTL … #define mmHDP_NONSURFACE_BASE … #define mmHDP_NONSURFACE_INFO … #define mmHDP_NONSURFACE_PREFETCH … #define mmHDP_NONSURFACE_SIZE … #define mmHDP_NONSURF_FLAGS … #define mmHDP_NONSURF_FLAGS_CLR … #define mmHDP_OUTSTANDING_REQ … #define mmHDP_SC_MULTI_CHIP_CNTL … #define mmHDP_SW_SEMAPHORE … #define mmHDP_TILING_CONFIG … #define mmHDP_XDP_BARS_ADDR_39_36 … #define mmHDP_XDP_BUSY_STS … #define mmHDP_XDP_CGTT_BLK_CTRL … #define mmHDP_XDP_CHKN … #define mmHDP_XDP_D2H_BAR_UPDATE … #define mmHDP_XDP_D2H_FLUSH … #define mmHDP_XDP_D2H_RSVD_10 … #define mmHDP_XDP_D2H_RSVD_11 … #define mmHDP_XDP_D2H_RSVD_12 … #define mmHDP_XDP_D2H_RSVD_13 … #define mmHDP_XDP_D2H_RSVD_14 … #define mmHDP_XDP_D2H_RSVD_15 … #define mmHDP_XDP_D2H_RSVD_16 … #define mmHDP_XDP_D2H_RSVD_17 … #define mmHDP_XDP_D2H_RSVD_18 … #define mmHDP_XDP_D2H_RSVD_19 … #define mmHDP_XDP_D2H_RSVD_20 … #define mmHDP_XDP_D2H_RSVD_21 … #define mmHDP_XDP_D2H_RSVD_22 … #define mmHDP_XDP_D2H_RSVD_23 … #define mmHDP_XDP_D2H_RSVD_24 … #define mmHDP_XDP_D2H_RSVD_25 … #define mmHDP_XDP_D2H_RSVD_26 … #define mmHDP_XDP_D2H_RSVD_27 … #define mmHDP_XDP_D2H_RSVD_28 … #define mmHDP_XDP_D2H_RSVD_29 … #define mmHDP_XDP_D2H_RSVD_30 … #define mmHDP_XDP_D2H_RSVD_3 … #define mmHDP_XDP_D2H_RSVD_31 … #define mmHDP_XDP_D2H_RSVD_32 … #define mmHDP_XDP_D2H_RSVD_33 … #define mmHDP_XDP_D2H_RSVD_34 … #define mmHDP_XDP_D2H_RSVD_4 … #define mmHDP_XDP_D2H_RSVD_5 … #define mmHDP_XDP_D2H_RSVD_6 … #define mmHDP_XDP_D2H_RSVD_7 … #define mmHDP_XDP_D2H_RSVD_8 … #define mmHDP_XDP_D2H_RSVD_9 … #define mmHDP_XDP_DBG_ADDR … #define mmHDP_XDP_DBG_DATA … #define mmHDP_XDP_DBG_MASK … #define mmHDP_XDP_DIRECT2HDP_FIRST … #define mmHDP_XDP_DIRECT2HDP_LAST … #define mmHDP_XDP_FLUSH_ARMED_STS … #define mmHDP_XDP_FLUSH_CNTR0_STS … #define mmHDP_XDP_HDP_IPH_CFG … #define mmHDP_XDP_HDP_MBX_MC_CFG … #define mmHDP_XDP_HDP_MC_CFG … #define mmHDP_XDP_HST_CFG … #define mmHDP_XDP_P2P_BAR0 … #define mmHDP_XDP_P2P_BAR1 … #define mmHDP_XDP_P2P_BAR2 … #define mmHDP_XDP_P2P_BAR3 … #define mmHDP_XDP_P2P_BAR4 … #define mmHDP_XDP_P2P_BAR5 … #define mmHDP_XDP_P2P_BAR6 … #define mmHDP_XDP_P2P_BAR7 … #define mmHDP_XDP_P2P_BAR_CFG … #define mmHDP_XDP_P2P_MBX_ADDR0 … #define mmHDP_XDP_P2P_MBX_ADDR1 … #define mmHDP_XDP_P2P_MBX_ADDR2 … #define mmHDP_XDP_P2P_MBX_ADDR3 … #define mmHDP_XDP_P2P_MBX_ADDR4 … #define mmHDP_XDP_P2P_MBX_ADDR5 … #define mmHDP_XDP_P2P_MBX_ADDR6 … #define mmHDP_XDP_P2P_MBX_OFFSET … #define mmHDP_XDP_SID_CFG … #define mmHDP_XDP_SRBM_CFG … #define mmHDP_XDP_STICKY … #define mmIH_ADVFAULT_CNTL … #define mmIH_CNTL … #define mmIH_LEVEL_STATUS … #define mmIH_PERFCOUNTER0_RESULT … #define mmIH_PERFCOUNTER1_RESULT … #define mmIH_PERFMON_CNTL … #define mmIH_RB_BASE … #define mmIH_RB_CNTL … #define mmIH_RB_RPTR … #define mmIH_RB_WPTR … #define mmIH_RB_WPTR_ADDR_HI … #define mmIH_RB_WPTR_ADDR_LO … #define mmIH_STATUS … #define mmSEM_MAILBOX … #define mmSEM_MAILBOX_CLIENTCONFIG … #define mmSEM_MAILBOX_CONTROL … #define mmSEM_MCIF_CONFIG … #define mmSRBM_CAM_DATA … #define mmSRBM_CAM_INDEX … #define mmSRBM_CHIP_REVISION … #define mmSRBM_CNTL … #define mmSRBM_DEBUG … #define mmSRBM_DEBUG_CNTL … #define mmSRBM_DEBUG_DATA … #define mmSRBM_DEBUG_SNAPSHOT … #define mmSRBM_GFX_CNTL … #define mmSRBM_INT_ACK … #define mmSRBM_INT_CNTL … #define mmSRBM_INT_STATUS … #define mmSRBM_MC_CLKEN_CNTL … #define mmSRBM_PERFCOUNTER0_HI … #define mmSRBM_PERFCOUNTER0_LO … #define mmSRBM_PERFCOUNTER0_SELECT … #define mmSRBM_PERFCOUNTER1_HI … #define mmSRBM_PERFCOUNTER1_LO … #define mmSRBM_PERFCOUNTER1_SELECT … #define mmSRBM_PERFMON_CNTL … #define mmSRBM_READ_ERROR … #define mmSRBM_SOFT_RESET … #define mmSRBM_STATUS … #define mmSRBM_STATUS2 … #define mmSRBM_SYS_CLKEN_CNTL … #define mmSRBM_UVD_CLKEN_CNTL … #define mmSRBM_VCE_CLKEN_CNTL … #define mmUVD_CONFIG … #define mmVCE_CONFIG … #define mmXDMA_MSTR_MEM_OVERFLOW_CNTL … /* from the old sid.h */ #define mmDMA_TILING_CONFIG … #endif
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