linux/drivers/gpu/drm/amd/include/vega10_ip_offset.h

/*
 * Copyright (C) 2018  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _vega10_ip_offset_HEADER
#define _vega10_ip_offset_HEADER

#define MAX_INSTANCE
#define MAX_SEGMENT

struct IP_BASE_INSTANCE {};

struct IP_BASE {};


static const struct IP_BASE __maybe_unused NBIF_BASE	=;
static const struct IP_BASE __maybe_unused NBIO_BASE	=;
static const struct IP_BASE __maybe_unused DCE_BASE	=;
static const struct IP_BASE __maybe_unused DCN_BASE	=;
static const struct IP_BASE __maybe_unused MP0_BASE	=;
static const struct IP_BASE __maybe_unused MP1_BASE	=;
static const struct IP_BASE __maybe_unused MP2_BASE	=;
static const struct IP_BASE __maybe_unused DF_BASE	=;
static const struct IP_BASE __maybe_unused UVD_BASE	=;  //note: GLN does not use the first segment
static const struct IP_BASE __maybe_unused VCN_BASE	=;  //note: GLN does not use the first segment
static const struct IP_BASE __maybe_unused DBGU_BASE	=; // not exist
static const struct IP_BASE __maybe_unused DBGU_NBIO_BASE	=; // not exist
static const struct IP_BASE __maybe_unused DBGU_IO_BASE	=; // not exist
static const struct IP_BASE __maybe_unused DFX_DAP_BASE	=; // not exist
static const struct IP_BASE __maybe_unused DFX_BASE	=; // this file does not contain registers
static const struct IP_BASE __maybe_unused ISP_BASE	=; // not exist
static const struct IP_BASE __maybe_unused SYSTEMHUB_BASE	=; // not exist
static const struct IP_BASE __maybe_unused L2IMU_BASE	=;
static const struct IP_BASE __maybe_unused IOHC_BASE	=;
static const struct IP_BASE __maybe_unused ATHUB_BASE	=;
static const struct IP_BASE __maybe_unused VCE_BASE	=;
static const struct IP_BASE __maybe_unused GC_BASE	=;
static const struct IP_BASE __maybe_unused MMHUB_BASE	=;
static const struct IP_BASE __maybe_unused RSMU_BASE	=;
static const struct IP_BASE __maybe_unused HDP_BASE	=;
static const struct IP_BASE __maybe_unused OSSSYS_BASE	 =;
static const struct IP_BASE __maybe_unused SDMA0_BASE	=;
static const struct IP_BASE __maybe_unused SDMA1_BASE	=;
static const struct IP_BASE __maybe_unused XDMA_BASE	=;
static const struct IP_BASE __maybe_unused UMC_BASE	=;
static const struct IP_BASE __maybe_unused THM_BASE	=;
static const struct IP_BASE __maybe_unused SMUIO_BASE	=;
static const struct IP_BASE __maybe_unused PWR_BASE	=;
static const struct IP_BASE __maybe_unused CLK_BASE	=;
static const struct IP_BASE __maybe_unused FUSE_BASE	=;


#define NBIF_BASE__INST0_SEG0
#define NBIF_BASE__INST0_SEG1
#define NBIF_BASE__INST0_SEG2
#define NBIF_BASE__INST0_SEG3
#define NBIF_BASE__INST0_SEG4

#define NBIF_BASE__INST1_SEG0
#define NBIF_BASE__INST1_SEG1
#define NBIF_BASE__INST1_SEG2
#define NBIF_BASE__INST1_SEG3
#define NBIF_BASE__INST1_SEG4

#define NBIF_BASE__INST2_SEG0
#define NBIF_BASE__INST2_SEG1
#define NBIF_BASE__INST2_SEG2
#define NBIF_BASE__INST2_SEG3
#define NBIF_BASE__INST2_SEG4

#define NBIF_BASE__INST3_SEG0
#define NBIF_BASE__INST3_SEG1
#define NBIF_BASE__INST3_SEG2
#define NBIF_BASE__INST3_SEG3
#define NBIF_BASE__INST3_SEG4

#define NBIF_BASE__INST4_SEG0
#define NBIF_BASE__INST4_SEG1
#define NBIF_BASE__INST4_SEG2
#define NBIF_BASE__INST4_SEG3
#define NBIF_BASE__INST4_SEG4

#define NBIO_BASE__INST0_SEG0
#define NBIO_BASE__INST0_SEG1
#define NBIO_BASE__INST0_SEG2
#define NBIO_BASE__INST0_SEG3
#define NBIO_BASE__INST0_SEG4

#define NBIO_BASE__INST1_SEG0
#define NBIO_BASE__INST1_SEG1
#define NBIO_BASE__INST1_SEG2
#define NBIO_BASE__INST1_SEG3
#define NBIO_BASE__INST1_SEG4

#define NBIO_BASE__INST2_SEG0
#define NBIO_BASE__INST2_SEG1
#define NBIO_BASE__INST2_SEG2
#define NBIO_BASE__INST2_SEG3
#define NBIO_BASE__INST2_SEG4

#define NBIO_BASE__INST3_SEG0
#define NBIO_BASE__INST3_SEG1
#define NBIO_BASE__INST3_SEG2
#define NBIO_BASE__INST3_SEG3
#define NBIO_BASE__INST3_SEG4

#define NBIO_BASE__INST4_SEG0
#define NBIO_BASE__INST4_SEG1
#define NBIO_BASE__INST4_SEG2
#define NBIO_BASE__INST4_SEG3
#define NBIO_BASE__INST4_SEG4

#define DCE_BASE__INST0_SEG0
#define DCE_BASE__INST0_SEG1
#define DCE_BASE__INST0_SEG2
#define DCE_BASE__INST0_SEG3
#define DCE_BASE__INST0_SEG4

#define DCE_BASE__INST1_SEG0
#define DCE_BASE__INST1_SEG1
#define DCE_BASE__INST1_SEG2
#define DCE_BASE__INST1_SEG3
#define DCE_BASE__INST1_SEG4

#define DCE_BASE__INST2_SEG0
#define DCE_BASE__INST2_SEG1
#define DCE_BASE__INST2_SEG2
#define DCE_BASE__INST2_SEG3
#define DCE_BASE__INST2_SEG4

#define DCE_BASE__INST3_SEG0
#define DCE_BASE__INST3_SEG1
#define DCE_BASE__INST3_SEG2
#define DCE_BASE__INST3_SEG3
#define DCE_BASE__INST3_SEG4

#define DCE_BASE__INST4_SEG0
#define DCE_BASE__INST4_SEG1
#define DCE_BASE__INST4_SEG2
#define DCE_BASE__INST4_SEG3
#define DCE_BASE__INST4_SEG4

#define DCN_BASE__INST0_SEG0
#define DCN_BASE__INST0_SEG1
#define DCN_BASE__INST0_SEG2
#define DCN_BASE__INST0_SEG3
#define DCN_BASE__INST0_SEG4

#define DCN_BASE__INST1_SEG0
#define DCN_BASE__INST1_SEG1
#define DCN_BASE__INST1_SEG2
#define DCN_BASE__INST1_SEG3
#define DCN_BASE__INST1_SEG4

#define DCN_BASE__INST2_SEG0
#define DCN_BASE__INST2_SEG1
#define DCN_BASE__INST2_SEG2
#define DCN_BASE__INST2_SEG3
#define DCN_BASE__INST2_SEG4

#define DCN_BASE__INST3_SEG0
#define DCN_BASE__INST3_SEG1
#define DCN_BASE__INST3_SEG2
#define DCN_BASE__INST3_SEG3
#define DCN_BASE__INST3_SEG4

#define DCN_BASE__INST4_SEG0
#define DCN_BASE__INST4_SEG1
#define DCN_BASE__INST4_SEG2
#define DCN_BASE__INST4_SEG3
#define DCN_BASE__INST4_SEG4

#define MP0_BASE__INST0_SEG0
#define MP0_BASE__INST0_SEG1
#define MP0_BASE__INST0_SEG2
#define MP0_BASE__INST0_SEG3
#define MP0_BASE__INST0_SEG4

#define MP0_BASE__INST1_SEG0
#define MP0_BASE__INST1_SEG1
#define MP0_BASE__INST1_SEG2
#define MP0_BASE__INST1_SEG3
#define MP0_BASE__INST1_SEG4

#define MP0_BASE__INST2_SEG0
#define MP0_BASE__INST2_SEG1
#define MP0_BASE__INST2_SEG2
#define MP0_BASE__INST2_SEG3
#define MP0_BASE__INST2_SEG4

#define MP0_BASE__INST3_SEG0
#define MP0_BASE__INST3_SEG1
#define MP0_BASE__INST3_SEG2
#define MP0_BASE__INST3_SEG3
#define MP0_BASE__INST3_SEG4

#define MP0_BASE__INST4_SEG0
#define MP0_BASE__INST4_SEG1
#define MP0_BASE__INST4_SEG2
#define MP0_BASE__INST4_SEG3
#define MP0_BASE__INST4_SEG4

#define MP1_BASE__INST0_SEG0
#define MP1_BASE__INST0_SEG1
#define MP1_BASE__INST0_SEG2
#define MP1_BASE__INST0_SEG3
#define MP1_BASE__INST0_SEG4

#define MP1_BASE__INST1_SEG0
#define MP1_BASE__INST1_SEG1
#define MP1_BASE__INST1_SEG2
#define MP1_BASE__INST1_SEG3
#define MP1_BASE__INST1_SEG4

#define MP1_BASE__INST2_SEG0
#define MP1_BASE__INST2_SEG1
#define MP1_BASE__INST2_SEG2
#define MP1_BASE__INST2_SEG3
#define MP1_BASE__INST2_SEG4

#define MP1_BASE__INST3_SEG0
#define MP1_BASE__INST3_SEG1
#define MP1_BASE__INST3_SEG2
#define MP1_BASE__INST3_SEG3
#define MP1_BASE__INST3_SEG4

#define MP1_BASE__INST4_SEG0
#define MP1_BASE__INST4_SEG1
#define MP1_BASE__INST4_SEG2
#define MP1_BASE__INST4_SEG3
#define MP1_BASE__INST4_SEG4

#define MP2_BASE__INST0_SEG0
#define MP2_BASE__INST0_SEG1
#define MP2_BASE__INST0_SEG2
#define MP2_BASE__INST0_SEG3
#define MP2_BASE__INST0_SEG4

#define MP2_BASE__INST1_SEG0
#define MP2_BASE__INST1_SEG1
#define MP2_BASE__INST1_SEG2
#define MP2_BASE__INST1_SEG3
#define MP2_BASE__INST1_SEG4

#define MP2_BASE__INST2_SEG0
#define MP2_BASE__INST2_SEG1
#define MP2_BASE__INST2_SEG2
#define MP2_BASE__INST2_SEG3
#define MP2_BASE__INST2_SEG4

#define MP2_BASE__INST3_SEG0
#define MP2_BASE__INST3_SEG1
#define MP2_BASE__INST3_SEG2
#define MP2_BASE__INST3_SEG3
#define MP2_BASE__INST3_SEG4

#define MP2_BASE__INST4_SEG0
#define MP2_BASE__INST4_SEG1
#define MP2_BASE__INST4_SEG2
#define MP2_BASE__INST4_SEG3
#define MP2_BASE__INST4_SEG4

#define DF_BASE__INST0_SEG0
#define DF_BASE__INST0_SEG1
#define DF_BASE__INST0_SEG2
#define DF_BASE__INST0_SEG3
#define DF_BASE__INST0_SEG4

#define DF_BASE__INST1_SEG0
#define DF_BASE__INST1_SEG1
#define DF_BASE__INST1_SEG2
#define DF_BASE__INST1_SEG3
#define DF_BASE__INST1_SEG4

#define DF_BASE__INST2_SEG0
#define DF_BASE__INST2_SEG1
#define DF_BASE__INST2_SEG2
#define DF_BASE__INST2_SEG3
#define DF_BASE__INST2_SEG4

#define DF_BASE__INST3_SEG0
#define DF_BASE__INST3_SEG1
#define DF_BASE__INST3_SEG2
#define DF_BASE__INST3_SEG3
#define DF_BASE__INST3_SEG4

#define DF_BASE__INST4_SEG0
#define DF_BASE__INST4_SEG1
#define DF_BASE__INST4_SEG2
#define DF_BASE__INST4_SEG3
#define DF_BASE__INST4_SEG4

#define UVD_BASE__INST0_SEG0
#define UVD_BASE__INST0_SEG1
#define UVD_BASE__INST0_SEG2
#define UVD_BASE__INST0_SEG3
#define UVD_BASE__INST0_SEG4

#define UVD_BASE__INST1_SEG0
#define UVD_BASE__INST1_SEG1
#define UVD_BASE__INST1_SEG2
#define UVD_BASE__INST1_SEG3
#define UVD_BASE__INST1_SEG4

#define UVD_BASE__INST2_SEG0
#define UVD_BASE__INST2_SEG1
#define UVD_BASE__INST2_SEG2
#define UVD_BASE__INST2_SEG3
#define UVD_BASE__INST2_SEG4

#define UVD_BASE__INST3_SEG0
#define UVD_BASE__INST3_SEG1
#define UVD_BASE__INST3_SEG2
#define UVD_BASE__INST3_SEG3
#define UVD_BASE__INST3_SEG4

#define UVD_BASE__INST4_SEG0
#define UVD_BASE__INST4_SEG1
#define UVD_BASE__INST4_SEG2
#define UVD_BASE__INST4_SEG3
#define UVD_BASE__INST4_SEG4

#define VCN_BASE__INST0_SEG0
#define VCN_BASE__INST0_SEG1
#define VCN_BASE__INST0_SEG2
#define VCN_BASE__INST0_SEG3
#define VCN_BASE__INST0_SEG4

#define VCN_BASE__INST1_SEG0
#define VCN_BASE__INST1_SEG1
#define VCN_BASE__INST1_SEG2
#define VCN_BASE__INST1_SEG3
#define VCN_BASE__INST1_SEG4

#define VCN_BASE__INST2_SEG0
#define VCN_BASE__INST2_SEG1
#define VCN_BASE__INST2_SEG2
#define VCN_BASE__INST2_SEG3
#define VCN_BASE__INST2_SEG4

#define VCN_BASE__INST3_SEG0
#define VCN_BASE__INST3_SEG1
#define VCN_BASE__INST3_SEG2
#define VCN_BASE__INST3_SEG3
#define VCN_BASE__INST3_SEG4

#define VCN_BASE__INST4_SEG0
#define VCN_BASE__INST4_SEG1
#define VCN_BASE__INST4_SEG2
#define VCN_BASE__INST4_SEG3
#define VCN_BASE__INST4_SEG4

#define DBGU_BASE__INST0_SEG0
#define DBGU_BASE__INST0_SEG1
#define DBGU_BASE__INST0_SEG2
#define DBGU_BASE__INST0_SEG3
#define DBGU_BASE__INST0_SEG4

#define DBGU_BASE__INST1_SEG0
#define DBGU_BASE__INST1_SEG1
#define DBGU_BASE__INST1_SEG2
#define DBGU_BASE__INST1_SEG3
#define DBGU_BASE__INST1_SEG4

#define DBGU_BASE__INST2_SEG0
#define DBGU_BASE__INST2_SEG1
#define DBGU_BASE__INST2_SEG2
#define DBGU_BASE__INST2_SEG3
#define DBGU_BASE__INST2_SEG4

#define DBGU_BASE__INST3_SEG0
#define DBGU_BASE__INST3_SEG1
#define DBGU_BASE__INST3_SEG2
#define DBGU_BASE__INST3_SEG3
#define DBGU_BASE__INST3_SEG4

#define DBGU_BASE__INST4_SEG0
#define DBGU_BASE__INST4_SEG1
#define DBGU_BASE__INST4_SEG2
#define DBGU_BASE__INST4_SEG3
#define DBGU_BASE__INST4_SEG4

#define DBGU_NBIO_BASE__INST0_SEG0
#define DBGU_NBIO_BASE__INST0_SEG1
#define DBGU_NBIO_BASE__INST0_SEG2
#define DBGU_NBIO_BASE__INST0_SEG3
#define DBGU_NBIO_BASE__INST0_SEG4

#define DBGU_NBIO_BASE__INST1_SEG0
#define DBGU_NBIO_BASE__INST1_SEG1
#define DBGU_NBIO_BASE__INST1_SEG2
#define DBGU_NBIO_BASE__INST1_SEG3
#define DBGU_NBIO_BASE__INST1_SEG4

#define DBGU_NBIO_BASE__INST2_SEG0
#define DBGU_NBIO_BASE__INST2_SEG1
#define DBGU_NBIO_BASE__INST2_SEG2
#define DBGU_NBIO_BASE__INST2_SEG3
#define DBGU_NBIO_BASE__INST2_SEG4

#define DBGU_NBIO_BASE__INST3_SEG0
#define DBGU_NBIO_BASE__INST3_SEG1
#define DBGU_NBIO_BASE__INST3_SEG2
#define DBGU_NBIO_BASE__INST3_SEG3
#define DBGU_NBIO_BASE__INST3_SEG4

#define DBGU_NBIO_BASE__INST4_SEG0
#define DBGU_NBIO_BASE__INST4_SEG1
#define DBGU_NBIO_BASE__INST4_SEG2
#define DBGU_NBIO_BASE__INST4_SEG3
#define DBGU_NBIO_BASE__INST4_SEG4

#define DBGU_IO_BASE__INST0_SEG0
#define DBGU_IO_BASE__INST0_SEG1
#define DBGU_IO_BASE__INST0_SEG2
#define DBGU_IO_BASE__INST0_SEG3
#define DBGU_IO_BASE__INST0_SEG4

#define DBGU_IO_BASE__INST1_SEG0
#define DBGU_IO_BASE__INST1_SEG1
#define DBGU_IO_BASE__INST1_SEG2
#define DBGU_IO_BASE__INST1_SEG3
#define DBGU_IO_BASE__INST1_SEG4

#define DBGU_IO_BASE__INST2_SEG0
#define DBGU_IO_BASE__INST2_SEG1
#define DBGU_IO_BASE__INST2_SEG2
#define DBGU_IO_BASE__INST2_SEG3
#define DBGU_IO_BASE__INST2_SEG4

#define DBGU_IO_BASE__INST3_SEG0
#define DBGU_IO_BASE__INST3_SEG1
#define DBGU_IO_BASE__INST3_SEG2
#define DBGU_IO_BASE__INST3_SEG3
#define DBGU_IO_BASE__INST3_SEG4

#define DBGU_IO_BASE__INST4_SEG0
#define DBGU_IO_BASE__INST4_SEG1
#define DBGU_IO_BASE__INST4_SEG2
#define DBGU_IO_BASE__INST4_SEG3
#define DBGU_IO_BASE__INST4_SEG4

#define DFX_DAP_BASE__INST0_SEG0
#define DFX_DAP_BASE__INST0_SEG1
#define DFX_DAP_BASE__INST0_SEG2
#define DFX_DAP_BASE__INST0_SEG3
#define DFX_DAP_BASE__INST0_SEG4

#define DFX_DAP_BASE__INST1_SEG0
#define DFX_DAP_BASE__INST1_SEG1
#define DFX_DAP_BASE__INST1_SEG2
#define DFX_DAP_BASE__INST1_SEG3
#define DFX_DAP_BASE__INST1_SEG4

#define DFX_DAP_BASE__INST2_SEG0
#define DFX_DAP_BASE__INST2_SEG1
#define DFX_DAP_BASE__INST2_SEG2
#define DFX_DAP_BASE__INST2_SEG3
#define DFX_DAP_BASE__INST2_SEG4

#define DFX_DAP_BASE__INST3_SEG0
#define DFX_DAP_BASE__INST3_SEG1
#define DFX_DAP_BASE__INST3_SEG2
#define DFX_DAP_BASE__INST3_SEG3
#define DFX_DAP_BASE__INST3_SEG4

#define DFX_DAP_BASE__INST4_SEG0
#define DFX_DAP_BASE__INST4_SEG1
#define DFX_DAP_BASE__INST4_SEG2
#define DFX_DAP_BASE__INST4_SEG3
#define DFX_DAP_BASE__INST4_SEG4

#define DFX_BASE__INST0_SEG0
#define DFX_BASE__INST0_SEG1
#define DFX_BASE__INST0_SEG2
#define DFX_BASE__INST0_SEG3
#define DFX_BASE__INST0_SEG4

#define DFX_BASE__INST1_SEG0
#define DFX_BASE__INST1_SEG1
#define DFX_BASE__INST1_SEG2
#define DFX_BASE__INST1_SEG3
#define DFX_BASE__INST1_SEG4

#define DFX_BASE__INST2_SEG0
#define DFX_BASE__INST2_SEG1
#define DFX_BASE__INST2_SEG2
#define DFX_BASE__INST2_SEG3
#define DFX_BASE__INST2_SEG4

#define DFX_BASE__INST3_SEG0
#define DFX_BASE__INST3_SEG1
#define DFX_BASE__INST3_SEG2
#define DFX_BASE__INST3_SEG3
#define DFX_BASE__INST3_SEG4

#define DFX_BASE__INST4_SEG0
#define DFX_BASE__INST4_SEG1
#define DFX_BASE__INST4_SEG2
#define DFX_BASE__INST4_SEG3
#define DFX_BASE__INST4_SEG4

#define ISP_BASE__INST0_SEG0
#define ISP_BASE__INST0_SEG1
#define ISP_BASE__INST0_SEG2
#define ISP_BASE__INST0_SEG3
#define ISP_BASE__INST0_SEG4

#define ISP_BASE__INST1_SEG0
#define ISP_BASE__INST1_SEG1
#define ISP_BASE__INST1_SEG2
#define ISP_BASE__INST1_SEG3
#define ISP_BASE__INST1_SEG4

#define ISP_BASE__INST2_SEG0
#define ISP_BASE__INST2_SEG1
#define ISP_BASE__INST2_SEG2
#define ISP_BASE__INST2_SEG3
#define ISP_BASE__INST2_SEG4

#define ISP_BASE__INST3_SEG0
#define ISP_BASE__INST3_SEG1
#define ISP_BASE__INST3_SEG2
#define ISP_BASE__INST3_SEG3
#define ISP_BASE__INST3_SEG4

#define ISP_BASE__INST4_SEG0
#define ISP_BASE__INST4_SEG1
#define ISP_BASE__INST4_SEG2
#define ISP_BASE__INST4_SEG3
#define ISP_BASE__INST4_SEG4

#define SYSTEMHUB_BASE__INST0_SEG0
#define SYSTEMHUB_BASE__INST0_SEG1
#define SYSTEMHUB_BASE__INST0_SEG2
#define SYSTEMHUB_BASE__INST0_SEG3
#define SYSTEMHUB_BASE__INST0_SEG4

#define SYSTEMHUB_BASE__INST1_SEG0
#define SYSTEMHUB_BASE__INST1_SEG1
#define SYSTEMHUB_BASE__INST1_SEG2
#define SYSTEMHUB_BASE__INST1_SEG3
#define SYSTEMHUB_BASE__INST1_SEG4

#define SYSTEMHUB_BASE__INST2_SEG0
#define SYSTEMHUB_BASE__INST2_SEG1
#define SYSTEMHUB_BASE__INST2_SEG2
#define SYSTEMHUB_BASE__INST2_SEG3
#define SYSTEMHUB_BASE__INST2_SEG4

#define SYSTEMHUB_BASE__INST3_SEG0
#define SYSTEMHUB_BASE__INST3_SEG1
#define SYSTEMHUB_BASE__INST3_SEG2
#define SYSTEMHUB_BASE__INST3_SEG3
#define SYSTEMHUB_BASE__INST3_SEG4

#define SYSTEMHUB_BASE__INST4_SEG0
#define SYSTEMHUB_BASE__INST4_SEG1
#define SYSTEMHUB_BASE__INST4_SEG2
#define SYSTEMHUB_BASE__INST4_SEG3
#define SYSTEMHUB_BASE__INST4_SEG4

#define L2IMU_BASE__INST0_SEG0
#define L2IMU_BASE__INST0_SEG1
#define L2IMU_BASE__INST0_SEG2
#define L2IMU_BASE__INST0_SEG3
#define L2IMU_BASE__INST0_SEG4

#define L2IMU_BASE__INST1_SEG0
#define L2IMU_BASE__INST1_SEG1
#define L2IMU_BASE__INST1_SEG2
#define L2IMU_BASE__INST1_SEG3
#define L2IMU_BASE__INST1_SEG4

#define L2IMU_BASE__INST2_SEG0
#define L2IMU_BASE__INST2_SEG1
#define L2IMU_BASE__INST2_SEG2
#define L2IMU_BASE__INST2_SEG3
#define L2IMU_BASE__INST2_SEG4

#define L2IMU_BASE__INST3_SEG0
#define L2IMU_BASE__INST3_SEG1
#define L2IMU_BASE__INST3_SEG2
#define L2IMU_BASE__INST3_SEG3
#define L2IMU_BASE__INST3_SEG4

#define L2IMU_BASE__INST4_SEG0
#define L2IMU_BASE__INST4_SEG1
#define L2IMU_BASE__INST4_SEG2
#define L2IMU_BASE__INST4_SEG3
#define L2IMU_BASE__INST4_SEG4

#define IOHC_BASE__INST0_SEG0
#define IOHC_BASE__INST0_SEG1
#define IOHC_BASE__INST0_SEG2
#define IOHC_BASE__INST0_SEG3
#define IOHC_BASE__INST0_SEG4

#define IOHC_BASE__INST1_SEG0
#define IOHC_BASE__INST1_SEG1
#define IOHC_BASE__INST1_SEG2
#define IOHC_BASE__INST1_SEG3
#define IOHC_BASE__INST1_SEG4

#define IOHC_BASE__INST2_SEG0
#define IOHC_BASE__INST2_SEG1
#define IOHC_BASE__INST2_SEG2
#define IOHC_BASE__INST2_SEG3
#define IOHC_BASE__INST2_SEG4

#define IOHC_BASE__INST3_SEG0
#define IOHC_BASE__INST3_SEG1
#define IOHC_BASE__INST3_SEG2
#define IOHC_BASE__INST3_SEG3
#define IOHC_BASE__INST3_SEG4

#define IOHC_BASE__INST4_SEG0
#define IOHC_BASE__INST4_SEG1
#define IOHC_BASE__INST4_SEG2
#define IOHC_BASE__INST4_SEG3
#define IOHC_BASE__INST4_SEG4

#define ATHUB_BASE__INST0_SEG0
#define ATHUB_BASE__INST0_SEG1
#define ATHUB_BASE__INST0_SEG2
#define ATHUB_BASE__INST0_SEG3
#define ATHUB_BASE__INST0_SEG4

#define ATHUB_BASE__INST1_SEG0
#define ATHUB_BASE__INST1_SEG1
#define ATHUB_BASE__INST1_SEG2
#define ATHUB_BASE__INST1_SEG3
#define ATHUB_BASE__INST1_SEG4

#define ATHUB_BASE__INST2_SEG0
#define ATHUB_BASE__INST2_SEG1
#define ATHUB_BASE__INST2_SEG2
#define ATHUB_BASE__INST2_SEG3
#define ATHUB_BASE__INST2_SEG4

#define ATHUB_BASE__INST3_SEG0
#define ATHUB_BASE__INST3_SEG1
#define ATHUB_BASE__INST3_SEG2
#define ATHUB_BASE__INST3_SEG3
#define ATHUB_BASE__INST3_SEG4

#define ATHUB_BASE__INST4_SEG0
#define ATHUB_BASE__INST4_SEG1
#define ATHUB_BASE__INST4_SEG2
#define ATHUB_BASE__INST4_SEG3
#define ATHUB_BASE__INST4_SEG4

#define VCE_BASE__INST0_SEG0
#define VCE_BASE__INST0_SEG1
#define VCE_BASE__INST0_SEG2
#define VCE_BASE__INST0_SEG3
#define VCE_BASE__INST0_SEG4

#define VCE_BASE__INST1_SEG0
#define VCE_BASE__INST1_SEG1
#define VCE_BASE__INST1_SEG2
#define VCE_BASE__INST1_SEG3
#define VCE_BASE__INST1_SEG4

#define VCE_BASE__INST2_SEG0
#define VCE_BASE__INST2_SEG1
#define VCE_BASE__INST2_SEG2
#define VCE_BASE__INST2_SEG3
#define VCE_BASE__INST2_SEG4

#define VCE_BASE__INST3_SEG0
#define VCE_BASE__INST3_SEG1
#define VCE_BASE__INST3_SEG2
#define VCE_BASE__INST3_SEG3
#define VCE_BASE__INST3_SEG4

#define VCE_BASE__INST4_SEG0
#define VCE_BASE__INST4_SEG1
#define VCE_BASE__INST4_SEG2
#define VCE_BASE__INST4_SEG3
#define VCE_BASE__INST4_SEG4

#define GC_BASE__INST0_SEG0
#define GC_BASE__INST0_SEG1
#define GC_BASE__INST0_SEG2
#define GC_BASE__INST0_SEG3
#define GC_BASE__INST0_SEG4

#define GC_BASE__INST1_SEG0
#define GC_BASE__INST1_SEG1
#define GC_BASE__INST1_SEG2
#define GC_BASE__INST1_SEG3
#define GC_BASE__INST1_SEG4

#define GC_BASE__INST2_SEG0
#define GC_BASE__INST2_SEG1
#define GC_BASE__INST2_SEG2
#define GC_BASE__INST2_SEG3
#define GC_BASE__INST2_SEG4

#define GC_BASE__INST3_SEG0
#define GC_BASE__INST3_SEG1
#define GC_BASE__INST3_SEG2
#define GC_BASE__INST3_SEG3
#define GC_BASE__INST3_SEG4

#define GC_BASE__INST4_SEG0
#define GC_BASE__INST4_SEG1
#define GC_BASE__INST4_SEG2
#define GC_BASE__INST4_SEG3
#define GC_BASE__INST4_SEG4

#define MMHUB_BASE__INST0_SEG0
#define MMHUB_BASE__INST0_SEG1
#define MMHUB_BASE__INST0_SEG2
#define MMHUB_BASE__INST0_SEG3
#define MMHUB_BASE__INST0_SEG4

#define MMHUB_BASE__INST1_SEG0
#define MMHUB_BASE__INST1_SEG1
#define MMHUB_BASE__INST1_SEG2
#define MMHUB_BASE__INST1_SEG3
#define MMHUB_BASE__INST1_SEG4

#define MMHUB_BASE__INST2_SEG0
#define MMHUB_BASE__INST2_SEG1
#define MMHUB_BASE__INST2_SEG2
#define MMHUB_BASE__INST2_SEG3
#define MMHUB_BASE__INST2_SEG4

#define MMHUB_BASE__INST3_SEG0
#define MMHUB_BASE__INST3_SEG1
#define MMHUB_BASE__INST3_SEG2
#define MMHUB_BASE__INST3_SEG3
#define MMHUB_BASE__INST3_SEG4

#define MMHUB_BASE__INST4_SEG0
#define MMHUB_BASE__INST4_SEG1
#define MMHUB_BASE__INST4_SEG2
#define MMHUB_BASE__INST4_SEG3
#define MMHUB_BASE__INST4_SEG4

#define RSMU_BASE__INST0_SEG0
#define RSMU_BASE__INST0_SEG1
#define RSMU_BASE__INST0_SEG2
#define RSMU_BASE__INST0_SEG3
#define RSMU_BASE__INST0_SEG4

#define RSMU_BASE__INST1_SEG0
#define RSMU_BASE__INST1_SEG1
#define RSMU_BASE__INST1_SEG2
#define RSMU_BASE__INST1_SEG3
#define RSMU_BASE__INST1_SEG4

#define RSMU_BASE__INST2_SEG0
#define RSMU_BASE__INST2_SEG1
#define RSMU_BASE__INST2_SEG2
#define RSMU_BASE__INST2_SEG3
#define RSMU_BASE__INST2_SEG4

#define RSMU_BASE__INST3_SEG0
#define RSMU_BASE__INST3_SEG1
#define RSMU_BASE__INST3_SEG2
#define RSMU_BASE__INST3_SEG3
#define RSMU_BASE__INST3_SEG4

#define RSMU_BASE__INST4_SEG0
#define RSMU_BASE__INST4_SEG1
#define RSMU_BASE__INST4_SEG2
#define RSMU_BASE__INST4_SEG3
#define RSMU_BASE__INST4_SEG4

#define HDP_BASE__INST0_SEG0
#define HDP_BASE__INST0_SEG1
#define HDP_BASE__INST0_SEG2
#define HDP_BASE__INST0_SEG3
#define HDP_BASE__INST0_SEG4

#define HDP_BASE__INST1_SEG0
#define HDP_BASE__INST1_SEG1
#define HDP_BASE__INST1_SEG2
#define HDP_BASE__INST1_SEG3
#define HDP_BASE__INST1_SEG4

#define HDP_BASE__INST2_SEG0
#define HDP_BASE__INST2_SEG1
#define HDP_BASE__INST2_SEG2
#define HDP_BASE__INST2_SEG3
#define HDP_BASE__INST2_SEG4

#define HDP_BASE__INST3_SEG0
#define HDP_BASE__INST3_SEG1
#define HDP_BASE__INST3_SEG2
#define HDP_BASE__INST3_SEG3
#define HDP_BASE__INST3_SEG4

#define HDP_BASE__INST4_SEG0
#define HDP_BASE__INST4_SEG1
#define HDP_BASE__INST4_SEG2
#define HDP_BASE__INST4_SEG3
#define HDP_BASE__INST4_SEG4

#define OSSSYS_BASE__INST0_SEG0
#define OSSSYS_BASE__INST0_SEG1
#define OSSSYS_BASE__INST0_SEG2
#define OSSSYS_BASE__INST0_SEG3
#define OSSSYS_BASE__INST0_SEG4

#define OSSSYS_BASE__INST1_SEG0
#define OSSSYS_BASE__INST1_SEG1
#define OSSSYS_BASE__INST1_SEG2
#define OSSSYS_BASE__INST1_SEG3
#define OSSSYS_BASE__INST1_SEG4

#define OSSSYS_BASE__INST2_SEG0
#define OSSSYS_BASE__INST2_SEG1
#define OSSSYS_BASE__INST2_SEG2
#define OSSSYS_BASE__INST2_SEG3
#define OSSSYS_BASE__INST2_SEG4

#define OSSSYS_BASE__INST3_SEG0
#define OSSSYS_BASE__INST3_SEG1
#define OSSSYS_BASE__INST3_SEG2
#define OSSSYS_BASE__INST3_SEG3
#define OSSSYS_BASE__INST3_SEG4

#define OSSSYS_BASE__INST4_SEG0
#define OSSSYS_BASE__INST4_SEG1
#define OSSSYS_BASE__INST4_SEG2
#define OSSSYS_BASE__INST4_SEG3
#define OSSSYS_BASE__INST4_SEG4

#define SDMA0_BASE__INST0_SEG0
#define SDMA0_BASE__INST0_SEG1
#define SDMA0_BASE__INST0_SEG2
#define SDMA0_BASE__INST0_SEG3
#define SDMA0_BASE__INST0_SEG4

#define SDMA0_BASE__INST1_SEG0
#define SDMA0_BASE__INST1_SEG1
#define SDMA0_BASE__INST1_SEG2
#define SDMA0_BASE__INST1_SEG3
#define SDMA0_BASE__INST1_SEG4

#define SDMA0_BASE__INST2_SEG0
#define SDMA0_BASE__INST2_SEG1
#define SDMA0_BASE__INST2_SEG2
#define SDMA0_BASE__INST2_SEG3
#define SDMA0_BASE__INST2_SEG4

#define SDMA0_BASE__INST3_SEG0
#define SDMA0_BASE__INST3_SEG1
#define SDMA0_BASE__INST3_SEG2
#define SDMA0_BASE__INST3_SEG3
#define SDMA0_BASE__INST3_SEG4

#define SDMA0_BASE__INST4_SEG0
#define SDMA0_BASE__INST4_SEG1
#define SDMA0_BASE__INST4_SEG2
#define SDMA0_BASE__INST4_SEG3
#define SDMA0_BASE__INST4_SEG4

#define SDMA1_BASE__INST0_SEG0
#define SDMA1_BASE__INST0_SEG1
#define SDMA1_BASE__INST0_SEG2
#define SDMA1_BASE__INST0_SEG3
#define SDMA1_BASE__INST0_SEG4

#define SDMA1_BASE__INST1_SEG0
#define SDMA1_BASE__INST1_SEG1
#define SDMA1_BASE__INST1_SEG2
#define SDMA1_BASE__INST1_SEG3
#define SDMA1_BASE__INST1_SEG4

#define SDMA1_BASE__INST2_SEG0
#define SDMA1_BASE__INST2_SEG1
#define SDMA1_BASE__INST2_SEG2
#define SDMA1_BASE__INST2_SEG3
#define SDMA1_BASE__INST2_SEG4

#define SDMA1_BASE__INST3_SEG0
#define SDMA1_BASE__INST3_SEG1
#define SDMA1_BASE__INST3_SEG2
#define SDMA1_BASE__INST3_SEG3
#define SDMA1_BASE__INST3_SEG4

#define SDMA1_BASE__INST4_SEG0
#define SDMA1_BASE__INST4_SEG1
#define SDMA1_BASE__INST4_SEG2
#define SDMA1_BASE__INST4_SEG3
#define SDMA1_BASE__INST4_SEG4

#define XDMA_BASE__INST0_SEG0
#define XDMA_BASE__INST0_SEG1
#define XDMA_BASE__INST0_SEG2
#define XDMA_BASE__INST0_SEG3
#define XDMA_BASE__INST0_SEG4

#define XDMA_BASE__INST1_SEG0
#define XDMA_BASE__INST1_SEG1
#define XDMA_BASE__INST1_SEG2
#define XDMA_BASE__INST1_SEG3
#define XDMA_BASE__INST1_SEG4

#define XDMA_BASE__INST2_SEG0
#define XDMA_BASE__INST2_SEG1
#define XDMA_BASE__INST2_SEG2
#define XDMA_BASE__INST2_SEG3
#define XDMA_BASE__INST2_SEG4

#define XDMA_BASE__INST3_SEG0
#define XDMA_BASE__INST3_SEG1
#define XDMA_BASE__INST3_SEG2
#define XDMA_BASE__INST3_SEG3
#define XDMA_BASE__INST3_SEG4

#define XDMA_BASE__INST4_SEG0
#define XDMA_BASE__INST4_SEG1
#define XDMA_BASE__INST4_SEG2
#define XDMA_BASE__INST4_SEG3
#define XDMA_BASE__INST4_SEG4

#define UMC_BASE__INST0_SEG0
#define UMC_BASE__INST0_SEG1
#define UMC_BASE__INST0_SEG2
#define UMC_BASE__INST0_SEG3
#define UMC_BASE__INST0_SEG4

#define UMC_BASE__INST1_SEG0
#define UMC_BASE__INST1_SEG1
#define UMC_BASE__INST1_SEG2
#define UMC_BASE__INST1_SEG3
#define UMC_BASE__INST1_SEG4

#define UMC_BASE__INST2_SEG0
#define UMC_BASE__INST2_SEG1
#define UMC_BASE__INST2_SEG2
#define UMC_BASE__INST2_SEG3
#define UMC_BASE__INST2_SEG4

#define UMC_BASE__INST3_SEG0
#define UMC_BASE__INST3_SEG1
#define UMC_BASE__INST3_SEG2
#define UMC_BASE__INST3_SEG3
#define UMC_BASE__INST3_SEG4

#define UMC_BASE__INST4_SEG0
#define UMC_BASE__INST4_SEG1
#define UMC_BASE__INST4_SEG2
#define UMC_BASE__INST4_SEG3
#define UMC_BASE__INST4_SEG4

#define THM_BASE__INST0_SEG0
#define THM_BASE__INST0_SEG1
#define THM_BASE__INST0_SEG2
#define THM_BASE__INST0_SEG3
#define THM_BASE__INST0_SEG4

#define THM_BASE__INST1_SEG0
#define THM_BASE__INST1_SEG1
#define THM_BASE__INST1_SEG2
#define THM_BASE__INST1_SEG3
#define THM_BASE__INST1_SEG4

#define THM_BASE__INST2_SEG0
#define THM_BASE__INST2_SEG1
#define THM_BASE__INST2_SEG2
#define THM_BASE__INST2_SEG3
#define THM_BASE__INST2_SEG4

#define THM_BASE__INST3_SEG0
#define THM_BASE__INST3_SEG1
#define THM_BASE__INST3_SEG2
#define THM_BASE__INST3_SEG3
#define THM_BASE__INST3_SEG4

#define THM_BASE__INST4_SEG0
#define THM_BASE__INST4_SEG1
#define THM_BASE__INST4_SEG2
#define THM_BASE__INST4_SEG3
#define THM_BASE__INST4_SEG4

#define SMUIO_BASE__INST0_SEG0
#define SMUIO_BASE__INST0_SEG1
#define SMUIO_BASE__INST0_SEG2
#define SMUIO_BASE__INST0_SEG3
#define SMUIO_BASE__INST0_SEG4

#define SMUIO_BASE__INST1_SEG0
#define SMUIO_BASE__INST1_SEG1
#define SMUIO_BASE__INST1_SEG2
#define SMUIO_BASE__INST1_SEG3
#define SMUIO_BASE__INST1_SEG4

#define SMUIO_BASE__INST2_SEG0
#define SMUIO_BASE__INST2_SEG1
#define SMUIO_BASE__INST2_SEG2
#define SMUIO_BASE__INST2_SEG3
#define SMUIO_BASE__INST2_SEG4

#define SMUIO_BASE__INST3_SEG0
#define SMUIO_BASE__INST3_SEG1
#define SMUIO_BASE__INST3_SEG2
#define SMUIO_BASE__INST3_SEG3
#define SMUIO_BASE__INST3_SEG4

#define SMUIO_BASE__INST4_SEG0
#define SMUIO_BASE__INST4_SEG1
#define SMUIO_BASE__INST4_SEG2
#define SMUIO_BASE__INST4_SEG3
#define SMUIO_BASE__INST4_SEG4

#define PWR_BASE__INST0_SEG0
#define PWR_BASE__INST0_SEG1
#define PWR_BASE__INST0_SEG2
#define PWR_BASE__INST0_SEG3
#define PWR_BASE__INST0_SEG4

#define PWR_BASE__INST1_SEG0
#define PWR_BASE__INST1_SEG1
#define PWR_BASE__INST1_SEG2
#define PWR_BASE__INST1_SEG3
#define PWR_BASE__INST1_SEG4

#define PWR_BASE__INST2_SEG0
#define PWR_BASE__INST2_SEG1
#define PWR_BASE__INST2_SEG2
#define PWR_BASE__INST2_SEG3
#define PWR_BASE__INST2_SEG4

#define PWR_BASE__INST3_SEG0
#define PWR_BASE__INST3_SEG1
#define PWR_BASE__INST3_SEG2
#define PWR_BASE__INST3_SEG3
#define PWR_BASE__INST3_SEG4

#define PWR_BASE__INST4_SEG0
#define PWR_BASE__INST4_SEG1
#define PWR_BASE__INST4_SEG2
#define PWR_BASE__INST4_SEG3
#define PWR_BASE__INST4_SEG4

#define CLK_BASE__INST0_SEG0
#define CLK_BASE__INST0_SEG1
#define CLK_BASE__INST0_SEG2
#define CLK_BASE__INST0_SEG3
#define CLK_BASE__INST0_SEG4

#define CLK_BASE__INST1_SEG0
#define CLK_BASE__INST1_SEG1
#define CLK_BASE__INST1_SEG2
#define CLK_BASE__INST1_SEG3
#define CLK_BASE__INST1_SEG4

#define CLK_BASE__INST2_SEG0
#define CLK_BASE__INST2_SEG1
#define CLK_BASE__INST2_SEG2
#define CLK_BASE__INST2_SEG3
#define CLK_BASE__INST2_SEG4

#define CLK_BASE__INST3_SEG0
#define CLK_BASE__INST3_SEG1
#define CLK_BASE__INST3_SEG2
#define CLK_BASE__INST3_SEG3
#define CLK_BASE__INST3_SEG4

#define CLK_BASE__INST4_SEG0
#define CLK_BASE__INST4_SEG1
#define CLK_BASE__INST4_SEG2
#define CLK_BASE__INST4_SEG3
#define CLK_BASE__INST4_SEG4

#define FUSE_BASE__INST0_SEG0
#define FUSE_BASE__INST0_SEG1
#define FUSE_BASE__INST0_SEG2
#define FUSE_BASE__INST0_SEG3
#define FUSE_BASE__INST0_SEG4

#define FUSE_BASE__INST1_SEG0
#define FUSE_BASE__INST1_SEG1
#define FUSE_BASE__INST1_SEG2
#define FUSE_BASE__INST1_SEG3
#define FUSE_BASE__INST1_SEG4

#define FUSE_BASE__INST2_SEG0
#define FUSE_BASE__INST2_SEG1
#define FUSE_BASE__INST2_SEG2
#define FUSE_BASE__INST2_SEG3
#define FUSE_BASE__INST2_SEG4

#define FUSE_BASE__INST3_SEG0
#define FUSE_BASE__INST3_SEG1
#define FUSE_BASE__INST3_SEG2
#define FUSE_BASE__INST3_SEG3
#define FUSE_BASE__INST3_SEG4

#define FUSE_BASE__INST4_SEG0
#define FUSE_BASE__INST4_SEG1
#define FUSE_BASE__INST4_SEG2
#define FUSE_BASE__INST4_SEG3
#define FUSE_BASE__INST4_SEG4
#endif