linux/drivers/gpu/drm/amd/amdgpu/cik.c

/*
 * Copyright 2012 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Alex Deucher
 */
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/pci.h>

#include <drm/amdgpu_drm.h>

#include "amdgpu.h"
#include "amdgpu_atombios.h"
#include "amdgpu_ih.h"
#include "amdgpu_uvd.h"
#include "amdgpu_vce.h"
#include "cikd.h"
#include "atom.h"
#include "amd_pcie.h"

#include "cik.h"
#include "gmc_v7_0.h"
#include "cik_ih.h"
#include "dce_v8_0.h"
#include "gfx_v7_0.h"
#include "cik_sdma.h"
#include "uvd_v4_2.h"
#include "vce_v2_0.h"
#include "cik_dpm.h"

#include "uvd/uvd_4_2_d.h"

#include "smu/smu_7_0_1_d.h"
#include "smu/smu_7_0_1_sh_mask.h"

#include "dce/dce_8_0_d.h"
#include "dce/dce_8_0_sh_mask.h"

#include "bif/bif_4_1_d.h"
#include "bif/bif_4_1_sh_mask.h"

#include "gca/gfx_7_2_d.h"
#include "gca/gfx_7_2_enum.h"
#include "gca/gfx_7_2_sh_mask.h"

#include "gmc/gmc_7_1_d.h"
#include "gmc/gmc_7_1_sh_mask.h"

#include "oss/oss_2_0_d.h"
#include "oss/oss_2_0_sh_mask.h"

#include "amdgpu_dm.h"
#include "amdgpu_amdkfd.h"
#include "amdgpu_vkms.h"

static const struct amdgpu_video_codec_info cik_video_codecs_encode_array[] = …;

static const struct amdgpu_video_codecs cik_video_codecs_encode = …;

static const struct amdgpu_video_codec_info cik_video_codecs_decode_array[] = …;

static const struct amdgpu_video_codecs cik_video_codecs_decode = …;

static int cik_query_video_codecs(struct amdgpu_device *adev, bool encode,
				  const struct amdgpu_video_codecs **codecs)
{ … }

/*
 * Indirect registers accessor
 */
static u32 cik_pcie_rreg(struct amdgpu_device *adev, u32 reg)
{ … }

static void cik_pcie_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
{ … }

static u32 cik_smc_rreg(struct amdgpu_device *adev, u32 reg)
{ … }

static void cik_smc_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
{ … }

static u32 cik_uvd_ctx_rreg(struct amdgpu_device *adev, u32 reg)
{ … }

static void cik_uvd_ctx_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
{ … }

static u32 cik_didt_rreg(struct amdgpu_device *adev, u32 reg)
{ … }

static void cik_didt_wreg(struct amdgpu_device *adev, u32 reg, u32 v)
{ … }

static const u32 bonaire_golden_spm_registers[] = …;

static const u32 bonaire_golden_common_registers[] = …;

static const u32 bonaire_golden_registers[] = …;

static const u32 bonaire_mgcg_cgcg_init[] = …;

static const u32 spectre_golden_spm_registers[] = …;

static const u32 spectre_golden_common_registers[] = …;

static const u32 spectre_golden_registers[] = …;

static const u32 spectre_mgcg_cgcg_init[] = …;

static const u32 kalindi_golden_spm_registers[] = …;

static const u32 kalindi_golden_common_registers[] = …;

static const u32 kalindi_golden_registers[] = …;

static const u32 kalindi_mgcg_cgcg_init[] = …;

static const u32 hawaii_golden_spm_registers[] = …;

static const u32 hawaii_golden_common_registers[] = …;

static const u32 hawaii_golden_registers[] = …;

static const u32 hawaii_mgcg_cgcg_init[] = …;

static const u32 godavari_golden_registers[] = …;

static void cik_init_golden_registers(struct amdgpu_device *adev)
{ … }

/**
 * cik_get_xclk - get the xclk
 *
 * @adev: amdgpu_device pointer
 *
 * Returns the reference clock used by the gfx engine
 * (CIK).
 */
static u32 cik_get_xclk(struct amdgpu_device *adev)
{ … }

/**
 * cik_srbm_select - select specific register instances
 *
 * @adev: amdgpu_device pointer
 * @me: selected ME (micro engine)
 * @pipe: pipe
 * @queue: queue
 * @vmid: VMID
 *
 * Switches the currently active registers instances.  Some
 * registers are instanced per VMID, others are instanced per
 * me/pipe/queue combination.
 */
void cik_srbm_select(struct amdgpu_device *adev,
		     u32 me, u32 pipe, u32 queue, u32 vmid)
{ … }

static void cik_vga_set_state(struct amdgpu_device *adev, bool state)
{ … }

static bool cik_read_disabled_bios(struct amdgpu_device *adev)
{ … }

static bool cik_read_bios_from_rom(struct amdgpu_device *adev,
				   u8 *bios, u32 length_bytes)
{ … }

static const struct amdgpu_allowed_register_entry cik_allowed_read_registers[] = …;


static uint32_t cik_get_register_value(struct amdgpu_device *adev,
				       bool indexed, u32 se_num,
				       u32 sh_num, u32 reg_offset)
{ … }

static int cik_read_register(struct amdgpu_device *adev, u32 se_num,
			     u32 sh_num, u32 reg_offset, u32 *value)
{ … }

struct kv_reset_save_regs { … };

static void kv_save_regs_for_reset(struct amdgpu_device *adev,
				   struct kv_reset_save_regs *save)
{ … }

static void kv_restore_regs_for_reset(struct amdgpu_device *adev,
				      struct kv_reset_save_regs *save)
{ … }

/**
 * cik_asic_pci_config_reset - soft reset GPU
 *
 * @adev: amdgpu_device pointer
 *
 * Use PCI Config method to reset the GPU.
 *
 * Returns 0 for success.
 */
static int cik_asic_pci_config_reset(struct amdgpu_device *adev)
{ … }

static int cik_asic_supports_baco(struct amdgpu_device *adev)
{ … }

static enum amd_reset_method
cik_asic_reset_method(struct amdgpu_device *adev)
{ … }

/**
 * cik_asic_reset - soft reset GPU
 *
 * @adev: amdgpu_device pointer
 *
 * Look up which blocks are hung and attempt
 * to reset them.
 * Returns 0 for success.
 */
static int cik_asic_reset(struct amdgpu_device *adev)
{ … }

static u32 cik_get_config_memsize(struct amdgpu_device *adev)
{ … }

static int cik_set_uvd_clock(struct amdgpu_device *adev, u32 clock,
			      u32 cntl_reg, u32 status_reg)
{ … }

static int cik_set_uvd_clocks(struct amdgpu_device *adev, u32 vclk, u32 dclk)
{ … }

static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk)
{ … }

static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
{ … }

static void cik_program_aspm(struct amdgpu_device *adev)
{ … }

static uint32_t cik_get_rev_id(struct amdgpu_device *adev)
{ … }

static void cik_flush_hdp(struct amdgpu_device *adev, struct amdgpu_ring *ring)
{ … }

static void cik_invalidate_hdp(struct amdgpu_device *adev,
			       struct amdgpu_ring *ring)
{ … }

static bool cik_need_full_reset(struct amdgpu_device *adev)
{ … }

static void cik_get_pcie_usage(struct amdgpu_device *adev, uint64_t *count0,
			       uint64_t *count1)
{ … }

static bool cik_need_reset_on_init(struct amdgpu_device *adev)
{ … }

static uint64_t cik_get_pcie_replay_count(struct amdgpu_device *adev)
{ … }

static void cik_pre_asic_init(struct amdgpu_device *adev)
{ … }

static const struct amdgpu_asic_funcs cik_asic_funcs = …;

static int cik_common_early_init(void *handle)
{ … }

static int cik_common_sw_init(void *handle)
{ … }

static int cik_common_sw_fini(void *handle)
{ … }

static int cik_common_hw_init(void *handle)
{ … }

static int cik_common_hw_fini(void *handle)
{ … }

static int cik_common_suspend(void *handle)
{ … }

static int cik_common_resume(void *handle)
{ … }

static bool cik_common_is_idle(void *handle)
{ … }

static int cik_common_wait_for_idle(void *handle)
{ … }

static int cik_common_soft_reset(void *handle)
{ … }

static int cik_common_set_clockgating_state(void *handle,
					    enum amd_clockgating_state state)
{ … }

static int cik_common_set_powergating_state(void *handle,
					    enum amd_powergating_state state)
{ … }

static const struct amd_ip_funcs cik_common_ip_funcs = …;

static const struct amdgpu_ip_block_version cik_common_ip_block = …;

int cik_set_ip_blocks(struct amdgpu_device *adev)
{ … }