#ifndef VI_H
#define VI_H
#define SDMA0_REGISTER_OFFSET …
#define SDMA1_REGISTER_OFFSET …
#define SDMA_MAX_INSTANCE …
#define KFD_VI_SDMA_QUEUE_OFFSET …
#define CRTC0_REGISTER_OFFSET …
#define CRTC1_REGISTER_OFFSET …
#define CRTC2_REGISTER_OFFSET …
#define CRTC3_REGISTER_OFFSET …
#define CRTC4_REGISTER_OFFSET …
#define CRTC5_REGISTER_OFFSET …
#define CRTC6_REGISTER_OFFSET …
#define DIG0_REGISTER_OFFSET …
#define DIG1_REGISTER_OFFSET …
#define DIG2_REGISTER_OFFSET …
#define DIG3_REGISTER_OFFSET …
#define DIG4_REGISTER_OFFSET …
#define DIG5_REGISTER_OFFSET …
#define DIG6_REGISTER_OFFSET …
#define DIG7_REGISTER_OFFSET …
#define DIG8_REGISTER_OFFSET …
#define AUD0_REGISTER_OFFSET …
#define AUD1_REGISTER_OFFSET …
#define AUD2_REGISTER_OFFSET …
#define AUD3_REGISTER_OFFSET …
#define AUD4_REGISTER_OFFSET …
#define AUD5_REGISTER_OFFSET …
#define AUD6_REGISTER_OFFSET …
#define AUD7_REGISTER_OFFSET …
#define HPD0_REGISTER_OFFSET …
#define HPD1_REGISTER_OFFSET …
#define HPD2_REGISTER_OFFSET …
#define HPD3_REGISTER_OFFSET …
#define HPD4_REGISTER_OFFSET …
#define HPD5_REGISTER_OFFSET …
#define PIPEID(x) …
#define MEID(x) …
#define VMID(x) …
#define QUEUEID(x) …
#define MC_SEQ_MISC0__MT__MASK …
#define MC_SEQ_MISC0__MT__GDDR1 …
#define MC_SEQ_MISC0__MT__DDR2 …
#define MC_SEQ_MISC0__MT__GDDR3 …
#define MC_SEQ_MISC0__MT__GDDR4 …
#define MC_SEQ_MISC0__MT__GDDR5 …
#define MC_SEQ_MISC0__MT__HBM …
#define MC_SEQ_MISC0__MT__DDR3 …
#define PACKET_TYPE0 …
#define PACKET_TYPE1 …
#define PACKET_TYPE2 …
#define PACKET_TYPE3 …
#define CP_PACKET_GET_TYPE(h) …
#define CP_PACKET_GET_COUNT(h) …
#define CP_PACKET0_GET_REG(h) …
#define CP_PACKET3_GET_OPCODE(h) …
#define PACKET0(reg, n) …
#define CP_PACKET2 …
#define PACKET2_PAD_SHIFT …
#define PACKET2_PAD_MASK …
#define PACKET2(v) …
#define PACKET3(op, n) …
#define PACKET3_COMPUTE(op, n) …
#define PACKET3_NOP …
#define PACKET3_SET_BASE …
#define PACKET3_BASE_INDEX(x) …
#define CE_PARTITION_BASE …
#define PACKET3_CLEAR_STATE …
#define PACKET3_INDEX_BUFFER_SIZE …
#define PACKET3_DISPATCH_DIRECT …
#define PACKET3_DISPATCH_INDIRECT …
#define PACKET3_ATOMIC_GDS …
#define PACKET3_ATOMIC_MEM …
#define PACKET3_OCCLUSION_QUERY …
#define PACKET3_SET_PREDICATION …
#define PACKET3_REG_RMW …
#define PACKET3_COND_EXEC …
#define PACKET3_PRED_EXEC …
#define PACKET3_DRAW_INDIRECT …
#define PACKET3_DRAW_INDEX_INDIRECT …
#define PACKET3_INDEX_BASE …
#define PACKET3_DRAW_INDEX_2 …
#define PACKET3_CONTEXT_CONTROL …
#define PACKET3_INDEX_TYPE …
#define PACKET3_DRAW_INDIRECT_MULTI …
#define PACKET3_DRAW_INDEX_AUTO …
#define PACKET3_NUM_INSTANCES …
#define PACKET3_DRAW_INDEX_MULTI_AUTO …
#define PACKET3_INDIRECT_BUFFER_CONST …
#define PACKET3_STRMOUT_BUFFER_UPDATE …
#define PACKET3_DRAW_INDEX_OFFSET_2 …
#define PACKET3_DRAW_PREAMBLE …
#define PACKET3_WRITE_DATA …
#define WRITE_DATA_DST_SEL(x) …
#define WR_ONE_ADDR …
#define WR_CONFIRM …
#define WRITE_DATA_CACHE_POLICY(x) …
#define WRITE_DATA_ENGINE_SEL(x) …
#define PACKET3_DRAW_INDEX_INDIRECT_MULTI …
#define PACKET3_MEM_SEMAPHORE …
#define PACKET3_SEM_USE_MAILBOX …
#define PACKET3_SEM_SEL_SIGNAL_TYPE …
#define PACKET3_SEM_CLIENT_CODE …
#define PACKET3_SEM_SEL_SIGNAL …
#define PACKET3_SEM_SEL_WAIT …
#define PACKET3_WAIT_REG_MEM …
#define WAIT_REG_MEM_FUNCTION(x) …
#define WAIT_REG_MEM_MEM_SPACE(x) …
#define WAIT_REG_MEM_OPERATION(x) …
#define WAIT_REG_MEM_ENGINE(x) …
#define PACKET3_INDIRECT_BUFFER …
#define INDIRECT_BUFFER_TCL2_VOLATILE …
#define INDIRECT_BUFFER_VALID …
#define INDIRECT_BUFFER_CACHE_POLICY(x) …
#define INDIRECT_BUFFER_PRE_ENB(x) …
#define PACKET3_COPY_DATA …
#define PACKET3_PFP_SYNC_ME …
#define PACKET3_SURFACE_SYNC …
#define PACKET3_DEST_BASE_0_ENA …
#define PACKET3_DEST_BASE_1_ENA …
#define PACKET3_CB0_DEST_BASE_ENA …
#define PACKET3_CB1_DEST_BASE_ENA …
#define PACKET3_CB2_DEST_BASE_ENA …
#define PACKET3_CB3_DEST_BASE_ENA …
#define PACKET3_CB4_DEST_BASE_ENA …
#define PACKET3_CB5_DEST_BASE_ENA …
#define PACKET3_CB6_DEST_BASE_ENA …
#define PACKET3_CB7_DEST_BASE_ENA …
#define PACKET3_DB_DEST_BASE_ENA …
#define PACKET3_TCL1_VOL_ACTION_ENA …
#define PACKET3_TC_VOL_ACTION_ENA …
#define PACKET3_TC_WB_ACTION_ENA …
#define PACKET3_DEST_BASE_2_ENA …
#define PACKET3_DEST_BASE_3_ENA …
#define PACKET3_TCL1_ACTION_ENA …
#define PACKET3_TC_ACTION_ENA …
#define PACKET3_CB_ACTION_ENA …
#define PACKET3_DB_ACTION_ENA …
#define PACKET3_SH_KCACHE_ACTION_ENA …
#define PACKET3_SH_KCACHE_VOL_ACTION_ENA …
#define PACKET3_SH_ICACHE_ACTION_ENA …
#define PACKET3_COND_WRITE …
#define PACKET3_EVENT_WRITE …
#define EVENT_TYPE(x) …
#define EVENT_INDEX(x) …
#define PACKET3_EVENT_WRITE_EOP …
#define EOP_TCL1_VOL_ACTION_EN …
#define EOP_TC_VOL_ACTION_EN …
#define EOP_TC_WB_ACTION_EN …
#define EOP_TCL1_ACTION_EN …
#define EOP_TC_ACTION_EN …
#define EOP_TCL2_VOLATILE …
#define EOP_CACHE_POLICY(x) …
#define DATA_SEL(x) …
#define INT_SEL(x) …
#define DST_SEL(x) …
#define PACKET3_EVENT_WRITE_EOS …
#define PACKET3_RELEASE_MEM …
#define PACKET3_PREAMBLE_CNTL …
#define PACKET3_PREAMBLE_BEGIN_CLEAR_STATE …
#define PACKET3_PREAMBLE_END_CLEAR_STATE …
#define PACKET3_DMA_DATA …
#define PACKET3_DMA_DATA_ENGINE(x) …
#define PACKET3_DMA_DATA_SRC_CACHE_POLICY(x) …
#define PACKET3_DMA_DATA_SRC_VOLATILE …
#define PACKET3_DMA_DATA_DST_SEL(x) …
#define PACKET3_DMA_DATA_DST_CACHE_POLICY(x) …
#define PACKET3_DMA_DATA_DST_VOLATILE …
#define PACKET3_DMA_DATA_SRC_SEL(x) …
#define PACKET3_DMA_DATA_CP_SYNC …
#define PACKET3_DMA_DATA_DIS_WC …
#define PACKET3_DMA_DATA_CMD_SRC_SWAP(x) …
#define PACKET3_DMA_DATA_CMD_DST_SWAP(x) …
#define PACKET3_DMA_DATA_CMD_SAS …
#define PACKET3_DMA_DATA_CMD_DAS …
#define PACKET3_DMA_DATA_CMD_SAIC …
#define PACKET3_DMA_DATA_CMD_DAIC …
#define PACKET3_DMA_DATA_CMD_RAW_WAIT …
#define PACKET3_ACQUIRE_MEM …
#define PACKET3_REWIND …
#define PACKET3_LOAD_UCONFIG_REG …
#define PACKET3_LOAD_SH_REG …
#define PACKET3_LOAD_CONFIG_REG …
#define PACKET3_LOAD_CONTEXT_REG …
#define PACKET3_SET_CONFIG_REG …
#define PACKET3_SET_CONFIG_REG_START …
#define PACKET3_SET_CONFIG_REG_END …
#define PACKET3_SET_CONTEXT_REG …
#define PACKET3_SET_CONTEXT_REG_START …
#define PACKET3_SET_CONTEXT_REG_END …
#define PACKET3_SET_CONTEXT_REG_INDIRECT …
#define PACKET3_SET_SH_REG …
#define PACKET3_SET_SH_REG_START …
#define PACKET3_SET_SH_REG_END …
#define PACKET3_SET_SH_REG_OFFSET …
#define PACKET3_SET_QUEUE_REG …
#define PACKET3_SET_UCONFIG_REG …
#define PACKET3_SET_UCONFIG_REG_START …
#define PACKET3_SET_UCONFIG_REG_END …
#define PACKET3_SCRATCH_RAM_WRITE …
#define PACKET3_SCRATCH_RAM_READ …
#define PACKET3_LOAD_CONST_RAM …
#define PACKET3_WRITE_CONST_RAM …
#define PACKET3_DUMP_CONST_RAM …
#define PACKET3_INCREMENT_CE_COUNTER …
#define PACKET3_INCREMENT_DE_COUNTER …
#define PACKET3_WAIT_ON_CE_COUNTER …
#define PACKET3_WAIT_ON_DE_COUNTER_DIFF …
#define PACKET3_SWITCH_BUFFER …
#define PACKET3_FRAME_CONTROL …
#define FRAME_CMD(x) …
#define PACKET3_SET_RESOURCES …
#define PACKET3_SET_RESOURCES_VMID_MASK(x) …
#define PACKET3_SET_RESOURCES_UNMAP_LATENTY(x) …
#define PACKET3_SET_RESOURCES_QUEUE_TYPE(x) …
#define PACKET3_MAP_QUEUES …
#define PACKET3_MAP_QUEUES_QUEUE_SEL(x) …
#define PACKET3_MAP_QUEUES_VMID(x) …
#define PACKET3_MAP_QUEUES_QUEUE_TYPE(x) …
#define PACKET3_MAP_QUEUES_ALLOC_FORMAT(x) …
#define PACKET3_MAP_QUEUES_ENGINE_SEL(x) …
#define PACKET3_MAP_QUEUES_NUM_QUEUES(x) …
#define PACKET3_MAP_QUEUES_CHECK_DISABLE(x) …
#define PACKET3_MAP_QUEUES_DOORBELL_OFFSET(x) …
#define PACKET3_MAP_QUEUES_QUEUE(x) …
#define PACKET3_MAP_QUEUES_PIPE(x) …
#define PACKET3_MAP_QUEUES_ME(x) …
#define PACKET3_UNMAP_QUEUES …
#define PACKET3_UNMAP_QUEUES_ACTION(x) …
#define PACKET3_UNMAP_QUEUES_QUEUE_SEL(x) …
#define PACKET3_UNMAP_QUEUES_ENGINE_SEL(x) …
#define PACKET3_UNMAP_QUEUES_NUM_QUEUES(x) …
#define PACKET3_UNMAP_QUEUES_PASID(x) …
#define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(x) …
#define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET1(x) …
#define PACKET3_UNMAP_QUEUES_RB_WPTR(x) …
#define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET2(x) …
#define PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET3(x) …
#define PACKET3_QUERY_STATUS …
#define PACKET3_QUERY_STATUS_CONTEXT_ID(x) …
#define PACKET3_QUERY_STATUS_INTERRUPT_SEL(x) …
#define PACKET3_QUERY_STATUS_COMMAND(x) …
#define PACKET3_QUERY_STATUS_PASID(x) …
#define PACKET3_QUERY_STATUS_DOORBELL_OFFSET(x) …
#define PACKET3_QUERY_STATUS_ENG_SEL(x) …
#define VCE_CMD_NO_OP …
#define VCE_CMD_END …
#define VCE_CMD_IB …
#define VCE_CMD_FENCE …
#define VCE_CMD_TRAP …
#define VCE_CMD_IB_AUTO …
#define VCE_CMD_SEMAPHORE …
#define VCE_CMD_IB_VM …
#define VCE_CMD_WAIT_GE …
#define VCE_CMD_UPDATE_PTB …
#define VCE_CMD_FLUSH_TLB …
#define HEVC_ENC_CMD_NO_OP …
#define HEVC_ENC_CMD_END …
#define HEVC_ENC_CMD_FENCE …
#define HEVC_ENC_CMD_TRAP …
#define HEVC_ENC_CMD_IB_VM …
#define HEVC_ENC_CMD_WAIT_GE …
#define HEVC_ENC_CMD_UPDATE_PTB …
#define HEVC_ENC_CMD_FLUSH_TLB …
#define RB_MAP_PKR0(x) …
#define RB_MAP_PKR0_MASK …
#define RB_MAP_PKR1(x) …
#define RB_MAP_PKR1_MASK …
#define RB_XSEL2(x) …
#define RB_XSEL2_MASK …
#define RB_XSEL …
#define RB_YSEL …
#define PKR_MAP(x) …
#define PKR_MAP_MASK …
#define PKR_XSEL(x) …
#define PKR_XSEL_MASK …
#define PKR_YSEL(x) …
#define PKR_YSEL_MASK …
#define SC_MAP(x) …
#define SC_MAP_MASK …
#define SC_XSEL(x) …
#define SC_XSEL_MASK …
#define SC_YSEL(x) …
#define SC_YSEL_MASK …
#define SE_MAP(x) …
#define SE_MAP_MASK …
#define SE_XSEL(x) …
#define SE_XSEL_MASK …
#define SE_YSEL(x) …
#define SE_YSEL_MASK …
#define SE_PAIR_MAP(x) …
#define SE_PAIR_MAP_MASK …
#define SE_PAIR_XSEL(x) …
#define SE_PAIR_XSEL_MASK …
#define SE_PAIR_YSEL(x) …
#define SE_PAIR_YSEL_MASK …
#endif