linux/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

/*
 * GFX_8_0 Register documentation
 *
 * Copyright (C) 2014  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef GFX_8_0_D_H
#define GFX_8_0_D_H

#define mmCB_BLEND_RED …
#define mmCB_BLEND_GREEN …
#define mmCB_BLEND_BLUE …
#define mmCB_BLEND_ALPHA …
#define mmCB_DCC_CONTROL …
#define mmCB_COLOR_CONTROL …
#define mmCB_BLEND0_CONTROL …
#define mmCB_BLEND1_CONTROL …
#define mmCB_BLEND2_CONTROL …
#define mmCB_BLEND3_CONTROL …
#define mmCB_BLEND4_CONTROL …
#define mmCB_BLEND5_CONTROL …
#define mmCB_BLEND6_CONTROL …
#define mmCB_BLEND7_CONTROL …
#define mmCB_COLOR0_BASE …
#define mmCB_COLOR1_BASE …
#define mmCB_COLOR2_BASE …
#define mmCB_COLOR3_BASE …
#define mmCB_COLOR4_BASE …
#define mmCB_COLOR5_BASE …
#define mmCB_COLOR6_BASE …
#define mmCB_COLOR7_BASE …
#define mmCB_COLOR0_PITCH …
#define mmCB_COLOR1_PITCH …
#define mmCB_COLOR2_PITCH …
#define mmCB_COLOR3_PITCH …
#define mmCB_COLOR4_PITCH …
#define mmCB_COLOR5_PITCH …
#define mmCB_COLOR6_PITCH …
#define mmCB_COLOR7_PITCH …
#define mmCB_COLOR0_SLICE …
#define mmCB_COLOR1_SLICE …
#define mmCB_COLOR2_SLICE …
#define mmCB_COLOR3_SLICE …
#define mmCB_COLOR4_SLICE …
#define mmCB_COLOR5_SLICE …
#define mmCB_COLOR6_SLICE …
#define mmCB_COLOR7_SLICE …
#define mmCB_COLOR0_VIEW …
#define mmCB_COLOR1_VIEW …
#define mmCB_COLOR2_VIEW …
#define mmCB_COLOR3_VIEW …
#define mmCB_COLOR4_VIEW …
#define mmCB_COLOR5_VIEW …
#define mmCB_COLOR6_VIEW …
#define mmCB_COLOR7_VIEW …
#define mmCB_COLOR0_INFO …
#define mmCB_COLOR1_INFO …
#define mmCB_COLOR2_INFO …
#define mmCB_COLOR3_INFO …
#define mmCB_COLOR4_INFO …
#define mmCB_COLOR5_INFO …
#define mmCB_COLOR6_INFO …
#define mmCB_COLOR7_INFO …
#define mmCB_COLOR0_ATTRIB …
#define mmCB_COLOR1_ATTRIB …
#define mmCB_COLOR2_ATTRIB …
#define mmCB_COLOR3_ATTRIB …
#define mmCB_COLOR4_ATTRIB …
#define mmCB_COLOR5_ATTRIB …
#define mmCB_COLOR6_ATTRIB …
#define mmCB_COLOR7_ATTRIB …
#define mmCB_COLOR0_DCC_CONTROL …
#define mmCB_COLOR1_DCC_CONTROL …
#define mmCB_COLOR2_DCC_CONTROL …
#define mmCB_COLOR3_DCC_CONTROL …
#define mmCB_COLOR4_DCC_CONTROL …
#define mmCB_COLOR5_DCC_CONTROL …
#define mmCB_COLOR6_DCC_CONTROL …
#define mmCB_COLOR7_DCC_CONTROL …
#define mmCB_COLOR0_CMASK …
#define mmCB_COLOR1_CMASK …
#define mmCB_COLOR2_CMASK …
#define mmCB_COLOR3_CMASK …
#define mmCB_COLOR4_CMASK …
#define mmCB_COLOR5_CMASK …
#define mmCB_COLOR6_CMASK …
#define mmCB_COLOR7_CMASK …
#define mmCB_COLOR0_CMASK_SLICE …
#define mmCB_COLOR1_CMASK_SLICE …
#define mmCB_COLOR2_CMASK_SLICE …
#define mmCB_COLOR3_CMASK_SLICE …
#define mmCB_COLOR4_CMASK_SLICE …
#define mmCB_COLOR5_CMASK_SLICE …
#define mmCB_COLOR6_CMASK_SLICE …
#define mmCB_COLOR7_CMASK_SLICE …
#define mmCB_COLOR0_FMASK …
#define mmCB_COLOR1_FMASK …
#define mmCB_COLOR2_FMASK …
#define mmCB_COLOR3_FMASK …
#define mmCB_COLOR4_FMASK …
#define mmCB_COLOR5_FMASK …
#define mmCB_COLOR6_FMASK …
#define mmCB_COLOR7_FMASK …
#define mmCB_COLOR0_FMASK_SLICE …
#define mmCB_COLOR1_FMASK_SLICE …
#define mmCB_COLOR2_FMASK_SLICE …
#define mmCB_COLOR3_FMASK_SLICE …
#define mmCB_COLOR4_FMASK_SLICE …
#define mmCB_COLOR5_FMASK_SLICE …
#define mmCB_COLOR6_FMASK_SLICE …
#define mmCB_COLOR7_FMASK_SLICE …
#define mmCB_COLOR0_CLEAR_WORD0 …
#define mmCB_COLOR1_CLEAR_WORD0 …
#define mmCB_COLOR2_CLEAR_WORD0 …
#define mmCB_COLOR3_CLEAR_WORD0 …
#define mmCB_COLOR4_CLEAR_WORD0 …
#define mmCB_COLOR5_CLEAR_WORD0 …
#define mmCB_COLOR6_CLEAR_WORD0 …
#define mmCB_COLOR7_CLEAR_WORD0 …
#define mmCB_COLOR0_CLEAR_WORD1 …
#define mmCB_COLOR1_CLEAR_WORD1 …
#define mmCB_COLOR2_CLEAR_WORD1 …
#define mmCB_COLOR3_CLEAR_WORD1 …
#define mmCB_COLOR4_CLEAR_WORD1 …
#define mmCB_COLOR5_CLEAR_WORD1 …
#define mmCB_COLOR6_CLEAR_WORD1 …
#define mmCB_COLOR7_CLEAR_WORD1 …
#define mmCB_COLOR0_DCC_BASE …
#define mmCB_COLOR1_DCC_BASE …
#define mmCB_COLOR2_DCC_BASE …
#define mmCB_COLOR3_DCC_BASE …
#define mmCB_COLOR4_DCC_BASE …
#define mmCB_COLOR5_DCC_BASE …
#define mmCB_COLOR6_DCC_BASE …
#define mmCB_COLOR7_DCC_BASE …
#define mmCB_TARGET_MASK …
#define mmCB_SHADER_MASK …
#define mmCB_HW_CONTROL …
#define mmCB_HW_CONTROL_1 …
#define mmCB_HW_CONTROL_2 …
#define mmCB_HW_CONTROL_3 …
#define mmCB_DCC_CONFIG …
#define mmCB_PERFCOUNTER_FILTER …
#define mmCB_PERFCOUNTER0_SELECT …
#define mmCB_PERFCOUNTER0_SELECT1 …
#define mmCB_PERFCOUNTER1_SELECT …
#define mmCB_PERFCOUNTER2_SELECT …
#define mmCB_PERFCOUNTER3_SELECT …
#define mmCB_PERFCOUNTER0_LO …
#define mmCB_PERFCOUNTER1_LO …
#define mmCB_PERFCOUNTER2_LO …
#define mmCB_PERFCOUNTER3_LO …
#define mmCB_PERFCOUNTER0_HI …
#define mmCB_PERFCOUNTER1_HI …
#define mmCB_PERFCOUNTER2_HI …
#define mmCB_PERFCOUNTER3_HI …
#define mmCB_CGTT_SCLK_CTRL …
#define mmCB_DEBUG_BUS_1 …
#define mmCB_DEBUG_BUS_2 …
#define mmCB_DEBUG_BUS_3 …
#define mmCB_DEBUG_BUS_4 …
#define mmCB_DEBUG_BUS_5 …
#define mmCB_DEBUG_BUS_6 …
#define mmCB_DEBUG_BUS_7 …
#define mmCB_DEBUG_BUS_8 …
#define mmCB_DEBUG_BUS_9 …
#define mmCB_DEBUG_BUS_10 …
#define mmCB_DEBUG_BUS_11 …
#define mmCB_DEBUG_BUS_12 …
#define mmCB_DEBUG_BUS_13 …
#define mmCB_DEBUG_BUS_14 …
#define mmCB_DEBUG_BUS_15 …
#define mmCB_DEBUG_BUS_16 …
#define mmCB_DEBUG_BUS_17 …
#define mmCB_DEBUG_BUS_18 …
#define mmCB_DEBUG_BUS_19 …
#define mmCB_DEBUG_BUS_20 …
#define mmCB_DEBUG_BUS_21 …
#define mmCB_DEBUG_BUS_22 …
#define mmCP_DFY_CNTL …
#define mmCP_DFY_STAT …
#define mmCP_DFY_ADDR_HI …
#define mmCP_DFY_ADDR_LO …
#define mmCP_DFY_DATA_0 …
#define mmCP_DFY_DATA_1 …
#define mmCP_DFY_DATA_2 …
#define mmCP_DFY_DATA_3 …
#define mmCP_DFY_DATA_4 …
#define mmCP_DFY_DATA_5 …
#define mmCP_DFY_DATA_6 …
#define mmCP_DFY_DATA_7 …
#define mmCP_DFY_DATA_8 …
#define mmCP_DFY_DATA_9 …
#define mmCP_DFY_DATA_10 …
#define mmCP_DFY_DATA_11 …
#define mmCP_DFY_DATA_12 …
#define mmCP_DFY_DATA_13 …
#define mmCP_DFY_DATA_14 …
#define mmCP_DFY_DATA_15 …
#define mmCP_DFY_CMD …
#define mmCP_CPC_MGCG_SYNC_CNTL …
#define mmCP_RB0_BASE …
#define mmCP_RB0_BASE_HI …
#define mmCP_RB_BASE …
#define mmCP_RB1_BASE …
#define mmCP_RB1_BASE_HI …
#define mmCP_RB2_BASE …
#define mmCP_RB0_CNTL …
#define mmCP_RB_CNTL …
#define mmCP_RB1_CNTL …
#define mmCP_RB2_CNTL …
#define mmCP_RB_RPTR_WR …
#define mmCP_RB0_RPTR_ADDR …
#define mmCP_RB_RPTR_ADDR …
#define mmCP_RB1_RPTR_ADDR …
#define mmCP_RB2_RPTR_ADDR …
#define mmCP_RB0_RPTR_ADDR_HI …
#define mmCP_RB_RPTR_ADDR_HI …
#define mmCP_RB1_RPTR_ADDR_HI …
#define mmCP_RB2_RPTR_ADDR_HI …
#define mmCP_RB0_WPTR …
#define mmCP_RB_WPTR …
#define mmCP_RB1_WPTR …
#define mmCP_RB2_WPTR …
#define mmCP_RB_WPTR_POLL_ADDR_LO …
#define mmCP_RB_WPTR_POLL_ADDR_HI …
#define mmGC_PRIV_MODE …
#define mmCP_INT_CNTL …
#define mmCP_INT_CNTL_RING0 …
#define mmCP_INT_CNTL_RING1 …
#define mmCP_INT_CNTL_RING2 …
#define mmCP_INT_STATUS …
#define mmCP_INT_STATUS_RING0 …
#define mmCP_INT_STATUS_RING1 …
#define mmCP_INT_STATUS_RING2 …
#define mmCP_DEVICE_ID …
#define mmCP_RING_PRIORITY_CNTS …
#define mmCP_ME0_PIPE_PRIORITY_CNTS …
#define mmCP_RING0_PRIORITY …
#define mmCP_ME0_PIPE0_PRIORITY …
#define mmCP_RING1_PRIORITY …
#define mmCP_ME0_PIPE1_PRIORITY …
#define mmCP_RING2_PRIORITY …
#define mmCP_ME0_PIPE2_PRIORITY …
#define mmCP_ENDIAN_SWAP …
#define mmCP_RB_VMID …
#define mmCP_ME0_PIPE0_VMID …
#define mmCP_ME0_PIPE1_VMID …
#define mmCP_RB_DOORBELL_CONTROL …
#define mmCP_RB_DOORBELL_RANGE_LOWER …
#define mmCP_RB_DOORBELL_RANGE_UPPER …
#define mmCP_MEC_DOORBELL_RANGE_LOWER …
#define mmCP_MEC_DOORBELL_RANGE_UPPER …
#define mmCP_PFP_UCODE_ADDR …
#define mmCP_PFP_UCODE_DATA …
#define mmCP_ME_RAM_RADDR …
#define mmCP_ME_RAM_WADDR …
#define mmCP_ME_RAM_DATA …
#define mmCGTT_CPC_CLK_CTRL …
#define mmCGTT_CPF_CLK_CTRL …
#define mmCGTT_CP_CLK_CTRL …
#define mmCP_CE_UCODE_ADDR …
#define mmCP_CE_UCODE_DATA …
#define mmCP_MEC_ME1_UCODE_ADDR …
#define mmCP_MEC_ME1_UCODE_DATA …
#define mmCP_MEC_ME2_UCODE_ADDR …
#define mmCP_MEC_ME2_UCODE_DATA …
#define mmCP_MEC1_F32_INT_DIS …
#define mmCP_MEC2_F32_INT_DIS …
#define mmCP_VIRT_STATUS …
#define mmCP_PWR_CNTL …
#define mmCP_MEM_SLP_CNTL …
#define mmCP_ECC_FIRSTOCCURRENCE …
#define mmCP_ECC_FIRSTOCCURRENCE_RING0 …
#define mmCP_ECC_FIRSTOCCURRENCE_RING1 …
#define mmCP_ECC_FIRSTOCCURRENCE_RING2 …
#define mmCP_CPF_DEBUG …
#define mmCP_PQ_WPTR_POLL_CNTL …
#define mmCP_PQ_WPTR_POLL_CNTL1 …
#define mmCPC_INT_CNTL …
#define mmCP_ME1_PIPE0_INT_CNTL …
#define mmCP_ME1_PIPE1_INT_CNTL …
#define mmCP_ME1_PIPE2_INT_CNTL …
#define mmCP_ME1_PIPE3_INT_CNTL …
#define mmCP_ME2_PIPE0_INT_CNTL …
#define mmCP_ME2_PIPE1_INT_CNTL …
#define mmCP_ME2_PIPE2_INT_CNTL …
#define mmCP_ME2_PIPE3_INT_CNTL …
#define mmCPC_INT_STATUS …
#define mmCP_ME1_PIPE0_INT_STATUS …
#define mmCP_ME1_PIPE1_INT_STATUS …
#define mmCP_ME1_PIPE2_INT_STATUS …
#define mmCP_ME1_PIPE3_INT_STATUS …
#define mmCP_ME2_PIPE0_INT_STATUS …
#define mmCP_ME2_PIPE1_INT_STATUS …
#define mmCP_ME2_PIPE2_INT_STATUS …
#define mmCP_ME2_PIPE3_INT_STATUS …
#define mmCP_ME1_INT_STAT_DEBUG …
#define mmCP_ME2_INT_STAT_DEBUG …
#define mmCP_ME1_PIPE_PRIORITY_CNTS …
#define mmCP_ME1_PIPE0_PRIORITY …
#define mmCP_ME1_PIPE1_PRIORITY …
#define mmCP_ME1_PIPE2_PRIORITY …
#define mmCP_ME1_PIPE3_PRIORITY …
#define mmCP_ME2_PIPE_PRIORITY_CNTS …
#define mmCP_ME2_PIPE0_PRIORITY …
#define mmCP_ME2_PIPE1_PRIORITY …
#define mmCP_ME2_PIPE2_PRIORITY …
#define mmCP_ME2_PIPE3_PRIORITY …
#define mmCP_CE_PRGRM_CNTR_START …
#define mmCP_PFP_PRGRM_CNTR_START …
#define mmCP_ME_PRGRM_CNTR_START …
#define mmCP_MEC1_PRGRM_CNTR_START …
#define mmCP_MEC2_PRGRM_CNTR_START …
#define mmCP_CE_INTR_ROUTINE_START …
#define mmCP_PFP_INTR_ROUTINE_START …
#define mmCP_ME_INTR_ROUTINE_START …
#define mmCP_MEC1_INTR_ROUTINE_START …
#define mmCP_MEC2_INTR_ROUTINE_START …
#define mmCP_CONTEXT_CNTL …
#define mmCP_MAX_CONTEXT …
#define mmCP_IQ_WAIT_TIME1 …
#define mmCP_IQ_WAIT_TIME2 …
#define mmCP_VMID_RESET …
#define mmCP_VMID_PREEMPT …
#define mmCP_VMID_STATUS …
#define mmCPC_INT_CNTX_ID …
#define mmCP_PQ_STATUS …
#define mmCP_CPC_IC_BASE_LO …
#define mmCP_CPC_IC_BASE_HI …
#define mmCP_CPC_IC_BASE_CNTL …
#define mmCP_CPC_IC_OP_CNTL …
#define mmCP_CPC_STATUS …
#define mmCP_CPC_BUSY_STAT …
#define mmCP_CPC_STALLED_STAT1 …
#define mmCP_CPF_STATUS …
#define mmCP_CPF_BUSY_STAT …
#define mmCP_CPF_STALLED_STAT1 …
#define mmCP_CPC_GRBM_FREE_COUNT …
#define mmCP_MEC_CNTL …
#define mmCP_MEC_ME1_HEADER_DUMP …
#define mmCP_MEC_ME2_HEADER_DUMP …
#define mmCP_CPC_SCRATCH_INDEX …
#define mmCP_CPC_SCRATCH_DATA …
#define mmCPG_PERFCOUNTER1_SELECT …
#define mmCPG_PERFCOUNTER1_LO …
#define mmCPG_PERFCOUNTER1_HI …
#define mmCPG_PERFCOUNTER0_SELECT1 …
#define mmCPG_PERFCOUNTER0_SELECT …
#define mmCPG_PERFCOUNTER0_LO …
#define mmCPG_PERFCOUNTER0_HI …
#define mmCPC_PERFCOUNTER1_SELECT …
#define mmCPC_PERFCOUNTER1_LO …
#define mmCPC_PERFCOUNTER1_HI …
#define mmCPC_PERFCOUNTER0_SELECT1 …
#define mmCPC_PERFCOUNTER0_SELECT …
#define mmCPC_PERFCOUNTER0_LO …
#define mmCPC_PERFCOUNTER0_HI …
#define mmCPF_PERFCOUNTER1_SELECT …
#define mmCPF_PERFCOUNTER1_LO …
#define mmCPF_PERFCOUNTER1_HI …
#define mmCPF_PERFCOUNTER0_SELECT1 …
#define mmCPF_PERFCOUNTER0_SELECT …
#define mmCPF_PERFCOUNTER0_LO …
#define mmCPF_PERFCOUNTER0_HI …
#define mmCP_CPC_HALT_HYST_COUNT …
#define mmCP_DRAW_OBJECT …
#define mmCP_DRAW_OBJECT_COUNTER …
#define mmCP_DRAW_WINDOW_MASK_HI …
#define mmCP_DRAW_WINDOW_HI …
#define mmCP_DRAW_WINDOW_LO …
#define mmCP_DRAW_WINDOW_CNTL …
#define mmCP_PRT_LOD_STATS_CNTL0 …
#define mmCP_PRT_LOD_STATS_CNTL1 …
#define mmCP_PRT_LOD_STATS_CNTL2 …
#define mmCP_CE_COMPARE_COUNT …
#define mmCP_CE_DE_COUNT …
#define mmCP_DE_CE_COUNT …
#define mmCP_DE_LAST_INVAL_COUNT …
#define mmCP_DE_DE_COUNT …
#define mmCP_EOP_DONE_EVENT_CNTL …
#define mmCP_EOP_DONE_DATA_CNTL …
#define mmCP_EOP_DONE_CNTX_ID …
#define mmCP_EOP_DONE_ADDR_LO …
#define mmCP_EOP_DONE_ADDR_HI …
#define mmCP_EOP_DONE_DATA_LO …
#define mmCP_EOP_DONE_DATA_HI …
#define mmCP_EOP_LAST_FENCE_LO …
#define mmCP_EOP_LAST_FENCE_HI …
#define mmCP_STREAM_OUT_ADDR_LO …
#define mmCP_STREAM_OUT_ADDR_HI …
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO …
#define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI …
#define mmCP_NUM_PRIM_NEEDED_COUNT0_LO …
#define mmCP_NUM_PRIM_NEEDED_COUNT0_HI …
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO …
#define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI …
#define mmCP_NUM_PRIM_NEEDED_COUNT1_LO …
#define mmCP_NUM_PRIM_NEEDED_COUNT1_HI …
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO …
#define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI …
#define mmCP_NUM_PRIM_NEEDED_COUNT2_LO …
#define mmCP_NUM_PRIM_NEEDED_COUNT2_HI …
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO …
#define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI …
#define mmCP_NUM_PRIM_NEEDED_COUNT3_LO …
#define mmCP_NUM_PRIM_NEEDED_COUNT3_HI …
#define mmCP_PIPE_STATS_ADDR_LO …
#define mmCP_PIPE_STATS_ADDR_HI …
#define mmCP_VGT_IAVERT_COUNT_LO …
#define mmCP_VGT_IAVERT_COUNT_HI …
#define mmCP_VGT_IAPRIM_COUNT_LO …
#define mmCP_VGT_IAPRIM_COUNT_HI …
#define mmCP_VGT_GSPRIM_COUNT_LO …
#define mmCP_VGT_GSPRIM_COUNT_HI …
#define mmCP_VGT_VSINVOC_COUNT_LO …
#define mmCP_VGT_VSINVOC_COUNT_HI …
#define mmCP_VGT_GSINVOC_COUNT_LO …
#define mmCP_VGT_GSINVOC_COUNT_HI …
#define mmCP_VGT_HSINVOC_COUNT_LO …
#define mmCP_VGT_HSINVOC_COUNT_HI …
#define mmCP_VGT_DSINVOC_COUNT_LO …
#define mmCP_VGT_DSINVOC_COUNT_HI …
#define mmCP_PA_CINVOC_COUNT_LO …
#define mmCP_PA_CINVOC_COUNT_HI …
#define mmCP_PA_CPRIM_COUNT_LO …
#define mmCP_PA_CPRIM_COUNT_HI …
#define mmCP_SC_PSINVOC_COUNT0_LO …
#define mmCP_SC_PSINVOC_COUNT0_HI …
#define mmCP_SC_PSINVOC_COUNT1_LO …
#define mmCP_SC_PSINVOC_COUNT1_HI …
#define mmCP_VGT_CSINVOC_COUNT_LO …
#define mmCP_VGT_CSINVOC_COUNT_HI …
#define mmCP_PIPE_STATS_CONTROL …
#define mmCP_STREAM_OUT_CONTROL …
#define mmCP_STRMOUT_CNTL …
#define mmSCRATCH_REG0 …
#define mmSCRATCH_REG1 …
#define mmSCRATCH_REG2 …
#define mmSCRATCH_REG3 …
#define mmSCRATCH_REG4 …
#define mmSCRATCH_REG5 …
#define mmSCRATCH_REG6 …
#define mmSCRATCH_REG7 …
#define mmSCRATCH_UMSK …
#define mmSCRATCH_ADDR …
#define mmCP_PFP_ATOMIC_PREOP_LO …
#define mmCP_PFP_ATOMIC_PREOP_HI …
#define mmCP_PFP_GDS_ATOMIC0_PREOP_LO …
#define mmCP_PFP_GDS_ATOMIC0_PREOP_HI …
#define mmCP_PFP_GDS_ATOMIC1_PREOP_LO …
#define mmCP_PFP_GDS_ATOMIC1_PREOP_HI …
#define mmCP_APPEND_ADDR_LO …
#define mmCP_APPEND_ADDR_HI …
#define mmCP_APPEND_DATA …
#define mmCP_APPEND_LAST_CS_FENCE …
#define mmCP_APPEND_LAST_PS_FENCE …
#define mmCP_ATOMIC_PREOP_LO …
#define mmCP_ME_ATOMIC_PREOP_LO …
#define mmCP_ATOMIC_PREOP_HI …
#define mmCP_ME_ATOMIC_PREOP_HI …
#define mmCP_GDS_ATOMIC0_PREOP_LO …
#define mmCP_ME_GDS_ATOMIC0_PREOP_LO …
#define mmCP_GDS_ATOMIC0_PREOP_HI …
#define mmCP_ME_GDS_ATOMIC0_PREOP_HI …
#define mmCP_GDS_ATOMIC1_PREOP_LO …
#define mmCP_ME_GDS_ATOMIC1_PREOP_LO …
#define mmCP_GDS_ATOMIC1_PREOP_HI …
#define mmCP_ME_GDS_ATOMIC1_PREOP_HI …
#define mmCP_ME_MC_WADDR_LO …
#define mmCP_ME_MC_WADDR_HI …
#define mmCP_ME_MC_WDATA_LO …
#define mmCP_ME_MC_WDATA_HI …
#define mmCP_ME_MC_RADDR_LO …
#define mmCP_ME_MC_RADDR_HI …
#define mmCP_SEM_WAIT_TIMER …
#define mmCP_SIG_SEM_ADDR_LO …
#define mmCP_SIG_SEM_ADDR_HI …
#define mmCP_WAIT_SEM_ADDR_LO …
#define mmCP_WAIT_SEM_ADDR_HI …
#define mmCP_WAIT_REG_MEM_TIMEOUT …
#define mmCP_COHER_START_DELAY …
#define mmCP_COHER_CNTL …
#define mmCP_COHER_SIZE …
#define mmCP_COHER_SIZE_HI …
#define mmCP_COHER_BASE …
#define mmCP_COHER_BASE_HI …
#define mmCP_COHER_STATUS …
#define mmCOHER_DEST_BASE_0 …
#define mmCOHER_DEST_BASE_1 …
#define mmCOHER_DEST_BASE_2 …
#define mmCOHER_DEST_BASE_3 …
#define mmCOHER_DEST_BASE_HI_0 …
#define mmCOHER_DEST_BASE_HI_1 …
#define mmCOHER_DEST_BASE_HI_2 …
#define mmCOHER_DEST_BASE_HI_3 …
#define mmCP_DMA_ME_SRC_ADDR …
#define mmCP_DMA_ME_SRC_ADDR_HI …
#define mmCP_DMA_ME_DST_ADDR …
#define mmCP_DMA_ME_DST_ADDR_HI …
#define mmCP_DMA_ME_CONTROL …
#define mmCP_DMA_ME_COMMAND …
#define mmCP_DMA_PFP_SRC_ADDR …
#define mmCP_DMA_PFP_SRC_ADDR_HI …
#define mmCP_DMA_PFP_DST_ADDR …
#define mmCP_DMA_PFP_DST_ADDR_HI …
#define mmCP_DMA_PFP_CONTROL …
#define mmCP_DMA_PFP_COMMAND …
#define mmCP_DMA_CNTL …
#define mmCP_DMA_READ_TAGS …
#define mmCP_PFP_IB_CONTROL …
#define mmCP_PFP_LOAD_CONTROL …
#define mmCP_SCRATCH_INDEX …
#define mmCP_SCRATCH_DATA …
#define mmCP_RB_OFFSET …
#define mmCP_IB1_OFFSET …
#define mmCP_IB2_OFFSET …
#define mmCP_IB1_PREAMBLE_BEGIN …
#define mmCP_IB1_PREAMBLE_END …
#define mmCP_IB2_PREAMBLE_BEGIN …
#define mmCP_IB2_PREAMBLE_END …
#define mmCP_CE_IB1_OFFSET …
#define mmCP_CE_IB2_OFFSET …
#define mmCP_CE_COUNTER …
#define mmCP_CE_RB_OFFSET …
#define mmCP_PFP_COMPLETION_STATUS …
#define mmCP_CE_COMPLETION_STATUS …
#define mmCP_PRED_NOT_VISIBLE …
#define mmCP_PFP_METADATA_BASE_ADDR …
#define mmCP_PFP_METADATA_BASE_ADDR_HI …
#define mmCP_CE_METADATA_BASE_ADDR …
#define mmCP_CE_METADATA_BASE_ADDR_HI …
#define mmCP_DRAW_INDX_INDR_ADDR …
#define mmCP_DRAW_INDX_INDR_ADDR_HI …
#define mmCP_DISPATCH_INDR_ADDR …
#define mmCP_DISPATCH_INDR_ADDR_HI …
#define mmCP_INDEX_BASE_ADDR …
#define mmCP_INDEX_BASE_ADDR_HI …
#define mmCP_INDEX_TYPE …
#define mmCP_GDS_BKUP_ADDR …
#define mmCP_GDS_BKUP_ADDR_HI …
#define mmCP_SAMPLE_STATUS …
#define mmCP_STALLED_STAT1 …
#define mmCP_STALLED_STAT2 …
#define mmCP_STALLED_STAT3 …
#define mmCP_BUSY_STAT …
#define mmCP_STAT …
#define mmCP_ME_HEADER_DUMP …
#define mmCP_PFP_HEADER_DUMP …
#define mmCP_GRBM_FREE_COUNT …
#define mmCP_CE_HEADER_DUMP …
#define mmCP_CSF_STAT …
#define mmCP_CSF_CNTL …
#define mmCP_ME_CNTL …
#define mmCP_CNTX_STAT …
#define mmCP_ME_PREEMPTION …
#define mmCP_RB0_RPTR …
#define mmCP_RB_RPTR …
#define mmCP_RB1_RPTR …
#define mmCP_RB2_RPTR …
#define mmCP_RB_WPTR_DELAY …
#define mmCP_RB_WPTR_POLL_CNTL …
#define mmCP_CE_INIT_BASE_LO …
#define mmCP_CE_INIT_BASE_HI …
#define mmCP_CE_INIT_BUFSZ …
#define mmCP_CE_IB1_BASE_LO …
#define mmCP_CE_IB1_BASE_HI …
#define mmCP_CE_IB1_BUFSZ …
#define mmCP_CE_IB2_BASE_LO …
#define mmCP_CE_IB2_BASE_HI …
#define mmCP_CE_IB2_BUFSZ …
#define mmCP_IB1_BASE_LO …
#define mmCP_IB1_BASE_HI …
#define mmCP_IB1_BUFSZ …
#define mmCP_IB2_BASE_LO …
#define mmCP_IB2_BASE_HI …
#define mmCP_IB2_BUFSZ …
#define mmCP_ST_BASE_LO …
#define mmCP_ST_BASE_HI …
#define mmCP_ST_BUFSZ …
#define mmCP_ROQ_THRESHOLDS …
#define mmCP_MEQ_STQ_THRESHOLD …
#define mmCP_ROQ1_THRESHOLDS …
#define mmCP_ROQ2_THRESHOLDS …
#define mmCP_STQ_THRESHOLDS …
#define mmCP_QUEUE_THRESHOLDS …
#define mmCP_MEQ_THRESHOLDS …
#define mmCP_ROQ_AVAIL …
#define mmCP_STQ_AVAIL …
#define mmCP_ROQ2_AVAIL …
#define mmCP_MEQ_AVAIL …
#define mmCP_CMD_INDEX …
#define mmCP_CMD_DATA …
#define mmCP_ROQ_RB_STAT …
#define mmCP_ROQ_IB1_STAT …
#define mmCP_ROQ_IB2_STAT …
#define mmCP_STQ_STAT …
#define mmCP_STQ_WR_STAT …
#define mmCP_MEQ_STAT …
#define mmCP_CEQ1_AVAIL …
#define mmCP_CEQ2_AVAIL …
#define mmCP_CE_ROQ_RB_STAT …
#define mmCP_CE_ROQ_IB1_STAT …
#define mmCP_CE_ROQ_IB2_STAT …
#define mmCP_INT_STAT_DEBUG …
#define mmCP_PERFMON_CNTL …
#define mmCP_PERFMON_CNTX_CNTL …
#define mmCP_RINGID …
#define mmCP_PIPEID …
#define mmCP_VMID …
#define mmCP_HPD_ROQ_OFFSETS …
#define mmCP_HPD_STATUS0 …
#define mmCP_MQD_BASE_ADDR …
#define mmCP_MQD_BASE_ADDR_HI …
#define mmCP_HQD_ACTIVE …
#define mmCP_HQD_VMID …
#define mmCP_HQD_PERSISTENT_STATE …
#define mmCP_HQD_PIPE_PRIORITY …
#define mmCP_HQD_QUEUE_PRIORITY …
#define mmCP_HQD_QUANTUM …
#define mmCP_HQD_PQ_BASE …
#define mmCP_HQD_PQ_BASE_HI …
#define mmCP_HQD_PQ_RPTR …
#define mmCP_HQD_PQ_RPTR_REPORT_ADDR …
#define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI …
#define mmCP_HQD_PQ_WPTR_POLL_ADDR …
#define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI …
#define mmCP_HQD_PQ_DOORBELL_CONTROL …
#define mmCP_HQD_PQ_WPTR …
#define mmCP_HQD_PQ_CONTROL …
#define mmCP_HQD_IB_BASE_ADDR …
#define mmCP_HQD_IB_BASE_ADDR_HI …
#define mmCP_HQD_IB_RPTR …
#define mmCP_HQD_IB_CONTROL …
#define mmCP_HQD_IQ_TIMER …
#define mmCP_HQD_IQ_RPTR …
#define mmCP_HQD_DEQUEUE_REQUEST …
#define mmCP_HQD_DMA_OFFLOAD …
#define mmCP_HQD_OFFLOAD …
#define mmCP_HQD_SEMA_CMD …
#define mmCP_HQD_MSG_TYPE …
#define mmCP_HQD_ATOMIC0_PREOP_LO …
#define mmCP_HQD_ATOMIC0_PREOP_HI …
#define mmCP_HQD_ATOMIC1_PREOP_LO …
#define mmCP_HQD_ATOMIC1_PREOP_HI …
#define mmCP_HQD_HQ_SCHEDULER0 …
#define mmCP_HQD_HQ_STATUS0 …
#define mmCP_HQD_HQ_SCHEDULER1 …
#define mmCP_HQD_HQ_CONTROL0 …
#define mmCP_MQD_CONTROL …
#define mmCP_HQD_HQ_STATUS1 …
#define mmCP_HQD_HQ_CONTROL1 …
#define mmCP_HQD_EOP_BASE_ADDR …
#define mmCP_HQD_EOP_BASE_ADDR_HI …
#define mmCP_HQD_EOP_CONTROL …
#define mmCP_HQD_EOP_RPTR …
#define mmCP_HQD_EOP_WPTR …
#define mmCP_HQD_EOP_EVENTS …
#define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO …
#define mmCP_HQD_CTX_SAVE_BASE_ADDR_HI …
#define mmCP_HQD_CTX_SAVE_CONTROL …
#define mmCP_HQD_CNTL_STACK_OFFSET …
#define mmCP_HQD_CNTL_STACK_SIZE …
#define mmCP_HQD_WG_STATE_OFFSET …
#define mmCP_HQD_CTX_SAVE_SIZE …
#define mmCP_HQD_GDS_RESOURCE_STATE …
#define mmCP_HQD_ERROR …
#define mmCP_HQD_EOP_WPTR_MEM …
#define mmCP_HQD_EOP_DONES …
#define mmDB_Z_READ_BASE …
#define mmDB_STENCIL_READ_BASE …
#define mmDB_Z_WRITE_BASE …
#define mmDB_STENCIL_WRITE_BASE …
#define mmDB_DEPTH_INFO …
#define mmDB_Z_INFO …
#define mmDB_STENCIL_INFO …
#define mmDB_DEPTH_SIZE …
#define mmDB_DEPTH_SLICE …
#define mmDB_DEPTH_VIEW …
#define mmDB_RENDER_CONTROL …
#define mmDB_COUNT_CONTROL …
#define mmDB_RENDER_OVERRIDE …
#define mmDB_RENDER_OVERRIDE2 …
#define mmDB_EQAA …
#define mmDB_SHADER_CONTROL …
#define mmDB_DEPTH_BOUNDS_MIN …
#define mmDB_DEPTH_BOUNDS_MAX …
#define mmDB_STENCIL_CLEAR …
#define mmDB_DEPTH_CLEAR …
#define mmDB_HTILE_DATA_BASE …
#define mmDB_HTILE_SURFACE …
#define mmDB_PRELOAD_CONTROL …
#define mmDB_STENCILREFMASK …
#define mmDB_STENCILREFMASK_BF …
#define mmDB_SRESULTS_COMPARE_STATE0 …
#define mmDB_SRESULTS_COMPARE_STATE1 …
#define mmDB_DEPTH_CONTROL …
#define mmDB_STENCIL_CONTROL …
#define mmDB_ALPHA_TO_MASK …
#define mmDB_PERFCOUNTER0_SELECT …
#define mmDB_PERFCOUNTER1_SELECT …
#define mmDB_PERFCOUNTER2_SELECT …
#define mmDB_PERFCOUNTER3_SELECT …
#define mmDB_PERFCOUNTER0_SELECT1 …
#define mmDB_PERFCOUNTER1_SELECT1 …
#define mmDB_PERFCOUNTER0_LO …
#define mmDB_PERFCOUNTER1_LO …
#define mmDB_PERFCOUNTER2_LO …
#define mmDB_PERFCOUNTER3_LO …
#define mmDB_PERFCOUNTER0_HI …
#define mmDB_PERFCOUNTER1_HI …
#define mmDB_PERFCOUNTER2_HI …
#define mmDB_PERFCOUNTER3_HI …
#define mmDB_DEBUG …
#define mmDB_DEBUG2 …
#define mmDB_DEBUG3 …
#define mmDB_DEBUG4 …
#define mmDB_CREDIT_LIMIT …
#define mmDB_WATERMARKS …
#define mmDB_SUBTILE_CONTROL …
#define mmDB_FREE_CACHELINES …
#define mmDB_FIFO_DEPTH1 …
#define mmDB_FIFO_DEPTH2 …
#define mmDB_CGTT_CLK_CTRL_0 …
#define mmDB_ZPASS_COUNT_LOW …
#define mmDB_ZPASS_COUNT_HI …
#define mmDB_RING_CONTROL …
#define mmDB_READ_DEBUG_0 …
#define mmDB_READ_DEBUG_1 …
#define mmDB_READ_DEBUG_2 …
#define mmDB_READ_DEBUG_3 …
#define mmDB_READ_DEBUG_4 …
#define mmDB_READ_DEBUG_5 …
#define mmDB_READ_DEBUG_6 …
#define mmDB_READ_DEBUG_7 …
#define mmDB_READ_DEBUG_8 …
#define mmDB_READ_DEBUG_9 …
#define mmDB_READ_DEBUG_A …
#define mmDB_READ_DEBUG_B …
#define mmDB_READ_DEBUG_C …
#define mmDB_READ_DEBUG_D …
#define mmDB_READ_DEBUG_E …
#define mmDB_READ_DEBUG_F …
#define mmDB_OCCLUSION_COUNT0_LOW …
#define mmDB_OCCLUSION_COUNT0_HI …
#define mmDB_OCCLUSION_COUNT1_LOW …
#define mmDB_OCCLUSION_COUNT1_HI …
#define mmDB_OCCLUSION_COUNT2_LOW …
#define mmDB_OCCLUSION_COUNT2_HI …
#define mmDB_OCCLUSION_COUNT3_LOW …
#define mmDB_OCCLUSION_COUNT3_HI …
#define mmCC_RB_REDUNDANCY …
#define mmCC_RB_BACKEND_DISABLE …
#define mmGC_USER_RB_REDUNDANCY …
#define mmGC_USER_RB_BACKEND_DISABLE …
#define mmGB_ADDR_CONFIG …
#define mmGB_BACKEND_MAP …
#define mmGB_GPU_ID …
#define mmCC_RB_DAISY_CHAIN …
#define mmGB_TILE_MODE0 …
#define mmGB_TILE_MODE1 …
#define mmGB_TILE_MODE2 …
#define mmGB_TILE_MODE3 …
#define mmGB_TILE_MODE4 …
#define mmGB_TILE_MODE5 …
#define mmGB_TILE_MODE6 …
#define mmGB_TILE_MODE7 …
#define mmGB_TILE_MODE8 …
#define mmGB_TILE_MODE9 …
#define mmGB_TILE_MODE10 …
#define mmGB_TILE_MODE11 …
#define mmGB_TILE_MODE12 …
#define mmGB_TILE_MODE13 …
#define mmGB_TILE_MODE14 …
#define mmGB_TILE_MODE15 …
#define mmGB_TILE_MODE16 …
#define mmGB_TILE_MODE17 …
#define mmGB_TILE_MODE18 …
#define mmGB_TILE_MODE19 …
#define mmGB_TILE_MODE20 …
#define mmGB_TILE_MODE21 …
#define mmGB_TILE_MODE22 …
#define mmGB_TILE_MODE23 …
#define mmGB_TILE_MODE24 …
#define mmGB_TILE_MODE25 …
#define mmGB_TILE_MODE26 …
#define mmGB_TILE_MODE27 …
#define mmGB_TILE_MODE28 …
#define mmGB_TILE_MODE29 …
#define mmGB_TILE_MODE30 …
#define mmGB_TILE_MODE31 …
#define mmGB_MACROTILE_MODE0 …
#define mmGB_MACROTILE_MODE1 …
#define mmGB_MACROTILE_MODE2 …
#define mmGB_MACROTILE_MODE3 …
#define mmGB_MACROTILE_MODE4 …
#define mmGB_MACROTILE_MODE5 …
#define mmGB_MACROTILE_MODE6 …
#define mmGB_MACROTILE_MODE7 …
#define mmGB_MACROTILE_MODE8 …
#define mmGB_MACROTILE_MODE9 …
#define mmGB_MACROTILE_MODE10 …
#define mmGB_MACROTILE_MODE11 …
#define mmGB_MACROTILE_MODE12 …
#define mmGB_MACROTILE_MODE13 …
#define mmGB_MACROTILE_MODE14 …
#define mmGB_MACROTILE_MODE15 …
#define mmGB_EDC_MODE …
#define mmCC_GC_EDC_CONFIG …
#define mmRAS_SIGNATURE_CONTROL …
#define mmRAS_SIGNATURE_MASK …
#define mmRAS_SX_SIGNATURE0 …
#define mmRAS_SX_SIGNATURE1 …
#define mmRAS_SX_SIGNATURE2 …
#define mmRAS_SX_SIGNATURE3 …
#define mmRAS_DB_SIGNATURE0 …
#define mmRAS_PA_SIGNATURE0 …
#define mmRAS_VGT_SIGNATURE0 …
#define mmRAS_SQ_SIGNATURE0 …
#define mmRAS_SC_SIGNATURE0 …
#define mmRAS_SC_SIGNATURE1 …
#define mmRAS_SC_SIGNATURE2 …
#define mmRAS_SC_SIGNATURE3 …
#define mmRAS_SC_SIGNATURE4 …
#define mmRAS_SC_SIGNATURE5 …
#define mmRAS_SC_SIGNATURE6 …
#define mmRAS_SC_SIGNATURE7 …
#define mmRAS_IA_SIGNATURE0 …
#define mmRAS_IA_SIGNATURE1 …
#define mmRAS_SPI_SIGNATURE0 …
#define mmRAS_SPI_SIGNATURE1 …
#define mmRAS_TA_SIGNATURE0 …
#define mmRAS_TD_SIGNATURE0 …
#define mmRAS_CB_SIGNATURE0 …
#define mmRAS_BCI_SIGNATURE0 …
#define mmRAS_BCI_SIGNATURE1 …
#define mmRAS_TA_SIGNATURE1 …
#define mmGRBM_HYP_CAM_INDEX …
#define mmGRBM_CAM_INDEX …
#define mmGRBM_HYP_CAM_DATA …
#define mmGRBM_CAM_DATA …
#define mmGRBM_CNTL …
#define mmGRBM_SKEW_CNTL …
#define mmGRBM_PWR_CNTL …
#define mmGRBM_STATUS …
#define mmGRBM_STATUS2 …
#define mmGRBM_STATUS_SE0 …
#define mmGRBM_STATUS_SE1 …
#define mmGRBM_STATUS_SE2 …
#define mmGRBM_STATUS_SE3 …
#define mmGRBM_SOFT_RESET …
#define mmGRBM_DEBUG_CNTL …
#define mmGRBM_DEBUG_DATA …
#define mmGRBM_GFX_INDEX …
#define mmGRBM_GFX_CLKEN_CNTL …
#define mmGRBM_WAIT_IDLE_CLOCKS …
#define mmGRBM_DEBUG …
#define mmGRBM_DEBUG_SNAPSHOT …
#define mmGRBM_READ_ERROR …
#define mmGRBM_READ_ERROR2 …
#define mmGRBM_INT_CNTL …
#define mmGRBM_TRAP_OP …
#define mmGRBM_TRAP_ADDR …
#define mmGRBM_TRAP_ADDR_MSK …
#define mmGRBM_TRAP_WD …
#define mmGRBM_TRAP_WD_MSK …
#define mmGRBM_DSM_BYPASS …
#define mmGRBM_WRITE_ERROR …
#define mmGRBM_PERFCOUNTER0_SELECT …
#define mmGRBM_PERFCOUNTER1_SELECT …
#define mmGRBM_SE0_PERFCOUNTER_SELECT …
#define mmGRBM_SE1_PERFCOUNTER_SELECT …
#define mmGRBM_SE2_PERFCOUNTER_SELECT …
#define mmGRBM_SE3_PERFCOUNTER_SELECT …
#define mmGRBM_PERFCOUNTER0_LO …
#define mmGRBM_PERFCOUNTER0_HI …
#define mmGRBM_PERFCOUNTER1_LO …
#define mmGRBM_PERFCOUNTER1_HI …
#define mmGRBM_SE0_PERFCOUNTER_LO …
#define mmGRBM_SE0_PERFCOUNTER_HI …
#define mmGRBM_SE1_PERFCOUNTER_LO …
#define mmGRBM_SE1_PERFCOUNTER_HI …
#define mmGRBM_SE2_PERFCOUNTER_LO …
#define mmGRBM_SE2_PERFCOUNTER_HI …
#define mmGRBM_SE3_PERFCOUNTER_LO …
#define mmGRBM_SE3_PERFCOUNTER_HI …
#define mmGRBM_SCRATCH_REG0 …
#define mmGRBM_SCRATCH_REG1 …
#define mmGRBM_SCRATCH_REG2 …
#define mmGRBM_SCRATCH_REG3 …
#define mmGRBM_SCRATCH_REG4 …
#define mmGRBM_SCRATCH_REG5 …
#define mmGRBM_SCRATCH_REG6 …
#define mmGRBM_SCRATCH_REG7 …
#define mmDEBUG_INDEX …
#define mmDEBUG_DATA …
#define mmGRBM_NOWHERE …
#define mmPA_CL_VPORT_XSCALE …
#define mmPA_CL_VPORT_XOFFSET …
#define mmPA_CL_VPORT_YSCALE …
#define mmPA_CL_VPORT_YOFFSET …
#define mmPA_CL_VPORT_ZSCALE …
#define mmPA_CL_VPORT_ZOFFSET …
#define mmPA_CL_VPORT_XSCALE_1 …
#define mmPA_CL_VPORT_XSCALE_2 …
#define mmPA_CL_VPORT_XSCALE_3 …
#define mmPA_CL_VPORT_XSCALE_4 …
#define mmPA_CL_VPORT_XSCALE_5 …
#define mmPA_CL_VPORT_XSCALE_6 …
#define mmPA_CL_VPORT_XSCALE_7 …
#define mmPA_CL_VPORT_XSCALE_8 …
#define mmPA_CL_VPORT_XSCALE_9 …
#define mmPA_CL_VPORT_XSCALE_10 …
#define mmPA_CL_VPORT_XSCALE_11 …
#define mmPA_CL_VPORT_XSCALE_12 …
#define mmPA_CL_VPORT_XSCALE_13 …
#define mmPA_CL_VPORT_XSCALE_14 …
#define mmPA_CL_VPORT_XSCALE_15 …
#define mmPA_CL_VPORT_XOFFSET_1 …
#define mmPA_CL_VPORT_XOFFSET_2 …
#define mmPA_CL_VPORT_XOFFSET_3 …
#define mmPA_CL_VPORT_XOFFSET_4 …
#define mmPA_CL_VPORT_XOFFSET_5 …
#define mmPA_CL_VPORT_XOFFSET_6 …
#define mmPA_CL_VPORT_XOFFSET_7 …
#define mmPA_CL_VPORT_XOFFSET_8 …
#define mmPA_CL_VPORT_XOFFSET_9 …
#define mmPA_CL_VPORT_XOFFSET_10 …
#define mmPA_CL_VPORT_XOFFSET_11 …
#define mmPA_CL_VPORT_XOFFSET_12 …
#define mmPA_CL_VPORT_XOFFSET_13 …
#define mmPA_CL_VPORT_XOFFSET_14 …
#define mmPA_CL_VPORT_XOFFSET_15 …
#define mmPA_CL_VPORT_YSCALE_1 …
#define mmPA_CL_VPORT_YSCALE_2 …
#define mmPA_CL_VPORT_YSCALE_3 …
#define mmPA_CL_VPORT_YSCALE_4 …
#define mmPA_CL_VPORT_YSCALE_5 …
#define mmPA_CL_VPORT_YSCALE_6 …
#define mmPA_CL_VPORT_YSCALE_7 …
#define mmPA_CL_VPORT_YSCALE_8 …
#define mmPA_CL_VPORT_YSCALE_9 …
#define mmPA_CL_VPORT_YSCALE_10 …
#define mmPA_CL_VPORT_YSCALE_11 …
#define mmPA_CL_VPORT_YSCALE_12 …
#define mmPA_CL_VPORT_YSCALE_13 …
#define mmPA_CL_VPORT_YSCALE_14 …
#define mmPA_CL_VPORT_YSCALE_15 …
#define mmPA_CL_VPORT_YOFFSET_1 …
#define mmPA_CL_VPORT_YOFFSET_2 …
#define mmPA_CL_VPORT_YOFFSET_3 …
#define mmPA_CL_VPORT_YOFFSET_4 …
#define mmPA_CL_VPORT_YOFFSET_5 …
#define mmPA_CL_VPORT_YOFFSET_6 …
#define mmPA_CL_VPORT_YOFFSET_7 …
#define mmPA_CL_VPORT_YOFFSET_8 …
#define mmPA_CL_VPORT_YOFFSET_9 …
#define mmPA_CL_VPORT_YOFFSET_10 …
#define mmPA_CL_VPORT_YOFFSET_11 …
#define mmPA_CL_VPORT_YOFFSET_12 …
#define mmPA_CL_VPORT_YOFFSET_13 …
#define mmPA_CL_VPORT_YOFFSET_14 …
#define mmPA_CL_VPORT_YOFFSET_15 …
#define mmPA_CL_VPORT_ZSCALE_1 …
#define mmPA_CL_VPORT_ZSCALE_2 …
#define mmPA_CL_VPORT_ZSCALE_3 …
#define mmPA_CL_VPORT_ZSCALE_4 …
#define mmPA_CL_VPORT_ZSCALE_5 …
#define mmPA_CL_VPORT_ZSCALE_6 …
#define mmPA_CL_VPORT_ZSCALE_7 …
#define mmPA_CL_VPORT_ZSCALE_8 …
#define mmPA_CL_VPORT_ZSCALE_9 …
#define mmPA_CL_VPORT_ZSCALE_10 …
#define mmPA_CL_VPORT_ZSCALE_11 …
#define mmPA_CL_VPORT_ZSCALE_12 …
#define mmPA_CL_VPORT_ZSCALE_13 …
#define mmPA_CL_VPORT_ZSCALE_14 …
#define mmPA_CL_VPORT_ZSCALE_15 …
#define mmPA_CL_VPORT_ZOFFSET_1 …
#define mmPA_CL_VPORT_ZOFFSET_2 …
#define mmPA_CL_VPORT_ZOFFSET_3 …
#define mmPA_CL_VPORT_ZOFFSET_4 …
#define mmPA_CL_VPORT_ZOFFSET_5 …
#define mmPA_CL_VPORT_ZOFFSET_6 …
#define mmPA_CL_VPORT_ZOFFSET_7 …
#define mmPA_CL_VPORT_ZOFFSET_8 …
#define mmPA_CL_VPORT_ZOFFSET_9 …
#define mmPA_CL_VPORT_ZOFFSET_10 …
#define mmPA_CL_VPORT_ZOFFSET_11 …
#define mmPA_CL_VPORT_ZOFFSET_12 …
#define mmPA_CL_VPORT_ZOFFSET_13 …
#define mmPA_CL_VPORT_ZOFFSET_14 …
#define mmPA_CL_VPORT_ZOFFSET_15 …
#define mmPA_CL_VTE_CNTL …
#define mmPA_CL_VS_OUT_CNTL …
#define mmPA_CL_NANINF_CNTL …
#define mmPA_CL_CLIP_CNTL …
#define mmPA_CL_GB_VERT_CLIP_ADJ …
#define mmPA_CL_GB_VERT_DISC_ADJ …
#define mmPA_CL_GB_HORZ_CLIP_ADJ …
#define mmPA_CL_GB_HORZ_DISC_ADJ …
#define mmPA_CL_UCP_0_X …
#define mmPA_CL_UCP_0_Y …
#define mmPA_CL_UCP_0_Z …
#define mmPA_CL_UCP_0_W …
#define mmPA_CL_UCP_1_X …
#define mmPA_CL_UCP_1_Y …
#define mmPA_CL_UCP_1_Z …
#define mmPA_CL_UCP_1_W …
#define mmPA_CL_UCP_2_X …
#define mmPA_CL_UCP_2_Y …
#define mmPA_CL_UCP_2_Z …
#define mmPA_CL_UCP_2_W …
#define mmPA_CL_UCP_3_X …
#define mmPA_CL_UCP_3_Y …
#define mmPA_CL_UCP_3_Z …
#define mmPA_CL_UCP_3_W …
#define mmPA_CL_UCP_4_X …
#define mmPA_CL_UCP_4_Y …
#define mmPA_CL_UCP_4_Z …
#define mmPA_CL_UCP_4_W …
#define mmPA_CL_UCP_5_X …
#define mmPA_CL_UCP_5_Y …
#define mmPA_CL_UCP_5_Z …
#define mmPA_CL_UCP_5_W …
#define mmPA_CL_POINT_X_RAD …
#define mmPA_CL_POINT_Y_RAD …
#define mmPA_CL_POINT_SIZE …
#define mmPA_CL_POINT_CULL_RAD …
#define mmPA_CL_ENHANCE …
#define mmPA_CL_RESET_DEBUG …
#define mmPA_SU_VTX_CNTL …
#define mmPA_SU_POINT_SIZE …
#define mmPA_SU_POINT_MINMAX …
#define mmPA_SU_LINE_CNTL …
#define mmPA_SU_LINE_STIPPLE_CNTL …
#define mmPA_SU_LINE_STIPPLE_SCALE …
#define mmPA_SU_PRIM_FILTER_CNTL …
#define mmPA_SU_SC_MODE_CNTL …
#define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL …
#define mmPA_SU_POLY_OFFSET_CLAMP …
#define mmPA_SU_POLY_OFFSET_FRONT_SCALE …
#define mmPA_SU_POLY_OFFSET_FRONT_OFFSET …
#define mmPA_SU_POLY_OFFSET_BACK_SCALE …
#define mmPA_SU_POLY_OFFSET_BACK_OFFSET …
#define mmPA_SU_HARDWARE_SCREEN_OFFSET …
#define mmPA_SU_LINE_STIPPLE_VALUE …
#define mmPA_SU_PERFCOUNTER0_SELECT …
#define mmPA_SU_PERFCOUNTER0_SELECT1 …
#define mmPA_SU_PERFCOUNTER1_SELECT …
#define mmPA_SU_PERFCOUNTER1_SELECT1 …
#define mmPA_SU_PERFCOUNTER2_SELECT …
#define mmPA_SU_PERFCOUNTER3_SELECT …
#define mmPA_SU_PERFCOUNTER0_LO …
#define mmPA_SU_PERFCOUNTER0_HI …
#define mmPA_SU_PERFCOUNTER1_LO …
#define mmPA_SU_PERFCOUNTER1_HI …
#define mmPA_SU_PERFCOUNTER2_LO …
#define mmPA_SU_PERFCOUNTER2_HI …
#define mmPA_SU_PERFCOUNTER3_LO …
#define mmPA_SU_PERFCOUNTER3_HI …
#define mmPA_SC_AA_CONFIG …
#define mmPA_SC_AA_MASK_X0Y0_X1Y0 …
#define mmPA_SC_AA_MASK_X0Y1_X1Y1 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 …
#define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 …
#define mmPA_SC_CENTROID_PRIORITY_0 …
#define mmPA_SC_CENTROID_PRIORITY_1 …
#define mmPA_SC_CLIPRECT_0_TL …
#define mmPA_SC_CLIPRECT_0_BR …
#define mmPA_SC_CLIPRECT_1_TL …
#define mmPA_SC_CLIPRECT_1_BR …
#define mmPA_SC_CLIPRECT_2_TL …
#define mmPA_SC_CLIPRECT_2_BR …
#define mmPA_SC_CLIPRECT_3_TL …
#define mmPA_SC_CLIPRECT_3_BR …
#define mmPA_SC_CLIPRECT_RULE …
#define mmPA_SC_EDGERULE …
#define mmPA_SC_LINE_CNTL …
#define mmPA_SC_LINE_STIPPLE …
#define mmPA_SC_MODE_CNTL_0 …
#define mmPA_SC_MODE_CNTL_1 …
#define mmPA_SC_RASTER_CONFIG …
#define mmPA_SC_RASTER_CONFIG_1 …
#define mmPA_SC_SCREEN_EXTENT_CONTROL …
#define mmPA_SC_GENERIC_SCISSOR_TL …
#define mmPA_SC_GENERIC_SCISSOR_BR …
#define mmPA_SC_SCREEN_SCISSOR_TL …
#define mmPA_SC_SCREEN_SCISSOR_BR …
#define mmPA_SC_WINDOW_OFFSET …
#define mmPA_SC_WINDOW_SCISSOR_TL …
#define mmPA_SC_WINDOW_SCISSOR_BR …
#define mmPA_SC_VPORT_SCISSOR_0_TL …
#define mmPA_SC_VPORT_SCISSOR_1_TL …
#define mmPA_SC_VPORT_SCISSOR_2_TL …
#define mmPA_SC_VPORT_SCISSOR_3_TL …
#define mmPA_SC_VPORT_SCISSOR_4_TL …
#define mmPA_SC_VPORT_SCISSOR_5_TL …
#define mmPA_SC_VPORT_SCISSOR_6_TL …
#define mmPA_SC_VPORT_SCISSOR_7_TL …
#define mmPA_SC_VPORT_SCISSOR_8_TL …
#define mmPA_SC_VPORT_SCISSOR_9_TL …
#define mmPA_SC_VPORT_SCISSOR_10_TL …
#define mmPA_SC_VPORT_SCISSOR_11_TL …
#define mmPA_SC_VPORT_SCISSOR_12_TL …
#define mmPA_SC_VPORT_SCISSOR_13_TL …
#define mmPA_SC_VPORT_SCISSOR_14_TL …
#define mmPA_SC_VPORT_SCISSOR_15_TL …
#define mmPA_SC_VPORT_SCISSOR_0_BR …
#define mmPA_SC_VPORT_SCISSOR_1_BR …
#define mmPA_SC_VPORT_SCISSOR_2_BR …
#define mmPA_SC_VPORT_SCISSOR_3_BR …
#define mmPA_SC_VPORT_SCISSOR_4_BR …
#define mmPA_SC_VPORT_SCISSOR_5_BR …
#define mmPA_SC_VPORT_SCISSOR_6_BR …
#define mmPA_SC_VPORT_SCISSOR_7_BR …
#define mmPA_SC_VPORT_SCISSOR_8_BR …
#define mmPA_SC_VPORT_SCISSOR_9_BR …
#define mmPA_SC_VPORT_SCISSOR_10_BR …
#define mmPA_SC_VPORT_SCISSOR_11_BR …
#define mmPA_SC_VPORT_SCISSOR_12_BR …
#define mmPA_SC_VPORT_SCISSOR_13_BR …
#define mmPA_SC_VPORT_SCISSOR_14_BR …
#define mmPA_SC_VPORT_SCISSOR_15_BR …
#define mmPA_SC_VPORT_ZMIN_0 …
#define mmPA_SC_VPORT_ZMIN_1 …
#define mmPA_SC_VPORT_ZMIN_2 …
#define mmPA_SC_VPORT_ZMIN_3 …
#define mmPA_SC_VPORT_ZMIN_4 …
#define mmPA_SC_VPORT_ZMIN_5 …
#define mmPA_SC_VPORT_ZMIN_6 …
#define mmPA_SC_VPORT_ZMIN_7 …
#define mmPA_SC_VPORT_ZMIN_8 …
#define mmPA_SC_VPORT_ZMIN_9 …
#define mmPA_SC_VPORT_ZMIN_10 …
#define mmPA_SC_VPORT_ZMIN_11 …
#define mmPA_SC_VPORT_ZMIN_12 …
#define mmPA_SC_VPORT_ZMIN_13 …
#define mmPA_SC_VPORT_ZMIN_14 …
#define mmPA_SC_VPORT_ZMIN_15 …
#define mmPA_SC_VPORT_ZMAX_0 …
#define mmPA_SC_VPORT_ZMAX_1 …
#define mmPA_SC_VPORT_ZMAX_2 …
#define mmPA_SC_VPORT_ZMAX_3 …
#define mmPA_SC_VPORT_ZMAX_4 …
#define mmPA_SC_VPORT_ZMAX_5 …
#define mmPA_SC_VPORT_ZMAX_6 …
#define mmPA_SC_VPORT_ZMAX_7 …
#define mmPA_SC_VPORT_ZMAX_8 …
#define mmPA_SC_VPORT_ZMAX_9 …
#define mmPA_SC_VPORT_ZMAX_10 …
#define mmPA_SC_VPORT_ZMAX_11 …
#define mmPA_SC_VPORT_ZMAX_12 …
#define mmPA_SC_VPORT_ZMAX_13 …
#define mmPA_SC_VPORT_ZMAX_14 …
#define mmPA_SC_VPORT_ZMAX_15 …
#define mmPA_SC_ENHANCE …
#define mmPA_SC_FIFO_SIZE …
#define mmPA_SC_IF_FIFO_SIZE …
#define mmPA_SC_FORCE_EOV_MAX_CNTS …
#define mmPA_SC_LINE_STIPPLE_STATE …
#define mmPA_SC_SCREEN_EXTENT_MIN_0 …
#define mmPA_SC_SCREEN_EXTENT_MAX_0 …
#define mmPA_SC_SCREEN_EXTENT_MIN_1 …
#define mmPA_SC_SCREEN_EXTENT_MAX_1 …
#define mmPA_SC_PERFCOUNTER0_SELECT …
#define mmPA_SC_PERFCOUNTER0_SELECT1 …
#define mmPA_SC_PERFCOUNTER1_SELECT …
#define mmPA_SC_PERFCOUNTER2_SELECT …
#define mmPA_SC_PERFCOUNTER3_SELECT …
#define mmPA_SC_PERFCOUNTER4_SELECT …
#define mmPA_SC_PERFCOUNTER5_SELECT …
#define mmPA_SC_PERFCOUNTER6_SELECT …
#define mmPA_SC_PERFCOUNTER7_SELECT …
#define mmPA_SC_PERFCOUNTER0_LO …
#define mmPA_SC_PERFCOUNTER0_HI …
#define mmPA_SC_PERFCOUNTER1_LO …
#define mmPA_SC_PERFCOUNTER1_HI …
#define mmPA_SC_PERFCOUNTER2_LO …
#define mmPA_SC_PERFCOUNTER2_HI …
#define mmPA_SC_PERFCOUNTER3_LO …
#define mmPA_SC_PERFCOUNTER3_HI …
#define mmPA_SC_PERFCOUNTER4_LO …
#define mmPA_SC_PERFCOUNTER4_HI …
#define mmPA_SC_PERFCOUNTER5_LO …
#define mmPA_SC_PERFCOUNTER5_HI …
#define mmPA_SC_PERFCOUNTER6_LO …
#define mmPA_SC_PERFCOUNTER6_HI …
#define mmPA_SC_PERFCOUNTER7_LO …
#define mmPA_SC_PERFCOUNTER7_HI …
#define mmPA_SC_P3D_TRAP_SCREEN_HV_EN …
#define mmPA_SC_P3D_TRAP_SCREEN_H …
#define mmPA_SC_P3D_TRAP_SCREEN_V …
#define mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE …
#define mmPA_SC_P3D_TRAP_SCREEN_COUNT …
#define mmPA_SC_HP3D_TRAP_SCREEN_HV_EN …
#define mmPA_SC_HP3D_TRAP_SCREEN_H …
#define mmPA_SC_HP3D_TRAP_SCREEN_V …
#define mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE …
#define mmPA_SC_HP3D_TRAP_SCREEN_COUNT …
#define mmPA_SC_TRAP_SCREEN_HV_EN …
#define mmPA_SC_TRAP_SCREEN_H …
#define mmPA_SC_TRAP_SCREEN_V …
#define mmPA_SC_TRAP_SCREEN_OCCURRENCE …
#define mmPA_SC_TRAP_SCREEN_COUNT …
#define mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK …
#define mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK …
#define mmPA_SC_TRAP_SCREEN_HV_LOCK …
#define mmPA_CL_CNTL_STATUS …
#define mmPA_SU_CNTL_STATUS …
#define mmPA_SC_FIFO_DEPTH_CNTL …
#define mmCGTT_PA_CLK_CTRL …
#define mmCGTT_SC_CLK_CTRL …
#define mmPA_SU_DEBUG_CNTL …
#define mmPA_SU_DEBUG_DATA …
#define mmPA_SC_DEBUG_CNTL …
#define mmPA_SC_DEBUG_DATA …
#define ixCLIPPER_DEBUG_REG00 …
#define ixCLIPPER_DEBUG_REG01 …
#define ixCLIPPER_DEBUG_REG02 …
#define ixCLIPPER_DEBUG_REG03 …
#define ixCLIPPER_DEBUG_REG04 …
#define ixCLIPPER_DEBUG_REG05 …
#define ixCLIPPER_DEBUG_REG06 …
#define ixCLIPPER_DEBUG_REG07 …
#define ixCLIPPER_DEBUG_REG08 …
#define ixCLIPPER_DEBUG_REG09 …
#define ixCLIPPER_DEBUG_REG10 …
#define ixCLIPPER_DEBUG_REG11 …
#define ixCLIPPER_DEBUG_REG12 …
#define ixCLIPPER_DEBUG_REG13 …
#define ixCLIPPER_DEBUG_REG14 …
#define ixCLIPPER_DEBUG_REG15 …
#define ixCLIPPER_DEBUG_REG16 …
#define ixCLIPPER_DEBUG_REG17 …
#define ixCLIPPER_DEBUG_REG18 …
#define ixCLIPPER_DEBUG_REG19 …
#define ixSXIFCCG_DEBUG_REG0 …
#define ixSXIFCCG_DEBUG_REG1 …
#define ixSXIFCCG_DEBUG_REG2 …
#define ixSXIFCCG_DEBUG_REG3 …
#define ixSETUP_DEBUG_REG0 …
#define ixSETUP_DEBUG_REG1 …
#define ixSETUP_DEBUG_REG2 …
#define ixSETUP_DEBUG_REG3 …
#define ixSETUP_DEBUG_REG4 …
#define ixSETUP_DEBUG_REG5 …
#define ixPA_SC_DEBUG_REG0 …
#define ixPA_SC_DEBUG_REG1 …
#define mmCOMPUTE_DISPATCH_INITIATOR …
#define mmCOMPUTE_DIM_X …
#define mmCOMPUTE_DIM_Y …
#define mmCOMPUTE_DIM_Z …
#define mmCOMPUTE_START_X …
#define mmCOMPUTE_START_Y …
#define mmCOMPUTE_START_Z …
#define mmCOMPUTE_NUM_THREAD_X …
#define mmCOMPUTE_NUM_THREAD_Y …
#define mmCOMPUTE_NUM_THREAD_Z …
#define mmCOMPUTE_PIPELINESTAT_ENABLE …
#define mmCOMPUTE_PERFCOUNT_ENABLE …
#define mmCOMPUTE_PGM_LO …
#define mmCOMPUTE_PGM_HI …
#define mmCOMPUTE_TBA_LO …
#define mmCOMPUTE_TBA_HI …
#define mmCOMPUTE_TMA_LO …
#define mmCOMPUTE_TMA_HI …
#define mmCOMPUTE_PGM_RSRC1 …
#define mmCOMPUTE_PGM_RSRC2 …
#define mmCOMPUTE_VMID …
#define mmCOMPUTE_RESOURCE_LIMITS …
#define mmCOMPUTE_STATIC_THREAD_MGMT_SE0 …
#define mmCOMPUTE_STATIC_THREAD_MGMT_SE1 …
#define mmCOMPUTE_TMPRING_SIZE …
#define mmCOMPUTE_STATIC_THREAD_MGMT_SE2 …
#define mmCOMPUTE_STATIC_THREAD_MGMT_SE3 …
#define mmCOMPUTE_RESTART_X …
#define mmCOMPUTE_RESTART_Y …
#define mmCOMPUTE_RESTART_Z …
#define mmCOMPUTE_THREAD_TRACE_ENABLE …
#define mmCOMPUTE_MISC_RESERVED …
#define mmCOMPUTE_DISPATCH_ID …
#define mmCOMPUTE_THREADGROUP_ID …
#define mmCOMPUTE_RELAUNCH …
#define mmCOMPUTE_WAVE_RESTORE_ADDR_LO …
#define mmCOMPUTE_WAVE_RESTORE_ADDR_HI …
#define mmCOMPUTE_WAVE_RESTORE_CONTROL …
#define mmCOMPUTE_USER_DATA_0 …
#define mmCOMPUTE_USER_DATA_1 …
#define mmCOMPUTE_USER_DATA_2 …
#define mmCOMPUTE_USER_DATA_3 …
#define mmCOMPUTE_USER_DATA_4 …
#define mmCOMPUTE_USER_DATA_5 …
#define mmCOMPUTE_USER_DATA_6 …
#define mmCOMPUTE_USER_DATA_7 …
#define mmCOMPUTE_USER_DATA_8 …
#define mmCOMPUTE_USER_DATA_9 …
#define mmCOMPUTE_USER_DATA_10 …
#define mmCOMPUTE_USER_DATA_11 …
#define mmCOMPUTE_USER_DATA_12 …
#define mmCOMPUTE_USER_DATA_13 …
#define mmCOMPUTE_USER_DATA_14 …
#define mmCOMPUTE_USER_DATA_15 …
#define mmCOMPUTE_NOWHERE …
#define mmCSPRIV_CONNECT …
#define mmCSPRIV_THREAD_TRACE_TG0 …
#define mmCSPRIV_THREAD_TRACE_TG1 …
#define mmCSPRIV_THREAD_TRACE_TG2 …
#define mmCSPRIV_THREAD_TRACE_TG3 …
#define mmCSPRIV_THREAD_TRACE_EVENT …
#define mmRLC_CNTL …
#define mmRLC_DEBUG_SELECT …
#define mmRLC_DEBUG …
#define mmRLC_MC_CNTL …
#define mmRLC_STAT …
#define mmRLC_SAFE_MODE …
#define mmRLC_SOFT_RESET_GPU …
#define mmRLC_MEM_SLP_CNTL …
#define mmSMU_RLC_RESPONSE …
#define mmRLC_RLCV_SAFE_MODE …
#define mmRLC_SMU_SAFE_MODE …
#define mmRLC_RLCV_COMMAND …
#define mmRLC_PERFMON_CLK_CNTL …
#define mmRLC_PERFMON_CNTL …
#define mmRLC_PERFCOUNTER0_SELECT …
#define mmRLC_PERFCOUNTER1_SELECT …
#define mmRLC_PERFCOUNTER0_LO …
#define mmRLC_PERFCOUNTER1_LO …
#define mmRLC_PERFCOUNTER0_HI …
#define mmRLC_PERFCOUNTER1_HI …
#define mmCGTT_RLC_CLK_CTRL …
#define mmRLC_LB_CNTL …
#define mmRLC_LB_CNTR_MAX …
#define mmRLC_LB_CNTR_INIT …
#define mmRLC_LOAD_BALANCE_CNTR …
#define mmRLC_SAVE_AND_RESTORE_BASE …
#define mmRLC_JUMP_TABLE_RESTORE …
#define mmRLC_DRIVER_CPDMA_STATUS …
#define mmRLC_PG_DELAY_2 …
#define mmRLC_GPM_DEBUG_SELECT …
#define mmRLC_GPM_DEBUG …
#define mmRLC_HYP_GPM_UCODE_ADDR …
#define mmRLC_GPM_UCODE_ADDR …
#define mmRLC_HYP_GPM_UCODE_DATA …
#define mmRLC_GPM_UCODE_DATA …
#define mmGPU_BIST_CONTROL …
#define mmRLC_ROM_CNTL …
#define mmRLC_GPU_CLOCK_COUNT_LSB …
#define mmRLC_GPU_CLOCK_COUNT_MSB …
#define mmRLC_CAPTURE_GPU_CLOCK_COUNT …
#define mmRLC_UCODE_CNTL …
#define mmRLC_GPM_STAT …
#define mmRLC_GPU_CLOCK_32_RES_SEL …
#define mmRLC_GPU_CLOCK_32 …
#define mmRLC_PG_CNTL …
#define mmRLC_GPM_THREAD_PRIORITY …
#define mmRLC_GPM_THREAD_ENABLE …
#define mmRLC_GPM_VMID_THREAD0 …
#define mmRLC_GPM_VMID_THREAD1 …
#define mmRLC_CGTT_MGCG_OVERRIDE …
#define mmRLC_CGCG_CGLS_CTRL …
#define mmRLC_CGCG_RAMP_CTRL …
#define mmRLC_CGCG_CGLS_CTRL_3D …
#define mmRLC_CGCG_RAMP_CTRL_3D …
#define mmRLC_DYN_PG_STATUS …
#define mmRLC_DYN_PG_REQUEST …
#define mmRLC_PG_DELAY …
#define mmRLC_CU_STATUS …
#define mmRLC_LB_INIT_CU_MASK …
#define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK …
#define mmRLC_LB_PARAMS …
#define mmRLC_THREAD1_DELAY …
#define mmRLC_PG_ALWAYS_ON_CU_MASK …
#define mmRLC_MAX_PG_CU …
#define mmRLC_AUTO_PG_CTRL …
#define mmRLC_SMU_GRBM_REG_SAVE_CTRL …
#define mmRLC_SMU_PG_CTRL …
#define mmRLC_SMU_PG_WAKE_UP_CTRL …
#define mmRLC_SERDES_RD_MASTER_INDEX …
#define mmRLC_SERDES_RD_DATA_0 …
#define mmRLC_SERDES_RD_DATA_1 …
#define mmRLC_SERDES_RD_DATA_2 …
#define mmRLC_SERDES_WR_CU_MASTER_MASK …
#define mmRLC_SERDES_WR_NONCU_MASTER_MASK …
#define mmRLC_SERDES_WR_CTRL …
#define mmRLC_SERDES_WR_DATA …
#define mmRLC_SERDES_CU_MASTER_BUSY …
#define mmRLC_SERDES_NONCU_MASTER_BUSY …
#define mmRLC_GPM_GENERAL_0 …
#define mmRLC_GPM_GENERAL_1 …
#define mmRLC_GPM_GENERAL_2 …
#define mmRLC_GPM_GENERAL_3 …
#define mmRLC_GPM_GENERAL_4 …
#define mmRLC_GPM_GENERAL_5 …
#define mmRLC_GPM_GENERAL_6 …
#define mmRLC_GPM_GENERAL_7 …
#define mmRLC_GPM_CU_PD_TIMEOUT …
#define mmRLC_GPM_SCRATCH_ADDR …
#define mmRLC_GPM_SCRATCH_DATA …
#define mmRLC_STATIC_PG_STATUS …
#define mmRLC_GPM_PERF_COUNT_0 …
#define mmRLC_GPM_PERF_COUNT_1 …
#define mmRLC_GPR_REG1 …
#define mmRLC_GPR_REG2 …
#define mmRLC_MGCG_CTRL …
#define mmRLC_GPM_THREAD_RESET …
#define mmRLC_SPM_VMID …
#define mmRLC_SPM_INT_CNTL …
#define mmRLC_SPM_INT_STATUS …
#define mmRLC_SPM_DEBUG_SELECT …
#define mmRLC_SPM_DEBUG …
#define mmRLC_GPM_LOG_ADDR …
#define mmRLC_SMU_MESSAGE …
#define mmRLC_GPM_LOG_SIZE …
#define mmRLC_GPM_LOG_CONT …
#define mmRLC_PG_DELAY_3 …
#define mmRLC_GPM_INT_DISABLE_TH0 …
#define mmRLC_GPM_INT_DISABLE_TH1 …
#define mmRLC_GPM_INT_FORCE_TH0 …
#define mmRLC_GPM_INT_FORCE_TH1 …
#define mmRLC_SRM_CNTL …
#define mmRLC_SRM_DEBUG_SELECT …
#define mmRLC_SRM_DEBUG …
#define mmRLC_SRM_ARAM_ADDR …
#define mmRLC_SRM_ARAM_DATA …
#define mmRLC_SRM_DRAM_ADDR …
#define mmRLC_SRM_DRAM_DATA …
#define mmRLC_SRM_GPM_COMMAND …
#define mmRLC_SRM_GPM_COMMAND_STATUS …
#define mmRLC_SRM_RLCV_COMMAND …
#define mmRLC_SRM_RLCV_COMMAND_STATUS …
#define mmRLC_SRM_INDEX_CNTL_ADDR_0 …
#define mmRLC_SRM_INDEX_CNTL_ADDR_1 …
#define mmRLC_SRM_INDEX_CNTL_ADDR_2 …
#define mmRLC_SRM_INDEX_CNTL_ADDR_3 …
#define mmRLC_SRM_INDEX_CNTL_ADDR_4 …
#define mmRLC_SRM_INDEX_CNTL_ADDR_5 …
#define mmRLC_SRM_INDEX_CNTL_ADDR_6 …
#define mmRLC_SRM_INDEX_CNTL_ADDR_7 …
#define mmRLC_SRM_INDEX_CNTL_DATA_0 …
#define mmRLC_SRM_INDEX_CNTL_DATA_1 …
#define mmRLC_SRM_INDEX_CNTL_DATA_2 …
#define mmRLC_SRM_INDEX_CNTL_DATA_3 …
#define mmRLC_SRM_INDEX_CNTL_DATA_4 …
#define mmRLC_SRM_INDEX_CNTL_DATA_5 …
#define mmRLC_SRM_INDEX_CNTL_DATA_6 …
#define mmRLC_SRM_INDEX_CNTL_DATA_7 …
#define mmRLC_SRM_STAT …
#define mmRLC_SRM_GPM_ABORT …
#define mmRLC_CSIB_ADDR_LO …
#define mmRLC_CSIB_ADDR_HI …
#define mmRLC_CSIB_LENGTH …
#define mmRLC_CP_RESPONSE0 …
#define mmRLC_CP_RESPONSE1 …
#define mmRLC_CP_RESPONSE2 …
#define mmRLC_CP_RESPONSE3 …
#define mmRLC_SMU_COMMAND …
#define mmRLC_CP_SCHEDULERS …
#define mmRLC_SPM_PERFMON_CNTL …
#define mmRLC_SPM_PERFMON_RING_BASE_LO …
#define mmRLC_SPM_PERFMON_RING_BASE_HI …
#define mmRLC_SPM_PERFMON_RING_SIZE …
#define mmRLC_SPM_PERFMON_SEGMENT_SIZE …
#define mmRLC_SPM_SE_MUXSEL_ADDR …
#define mmRLC_SPM_SE_MUXSEL_DATA …
#define mmRLC_SPM_CPG_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_CPC_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_CPF_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_CB_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_DB_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_PA_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_GDS_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_IA_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_SC_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_TCC_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_TCA_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_TCP_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_TA_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_TD_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_VGT_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_SPI_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_SQG_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_SX_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_GLOBAL_MUXSEL_ADDR …
#define mmRLC_SPM_GLOBAL_MUXSEL_DATA …
#define mmRLC_SPM_RING_RDPTR …
#define mmRLC_SPM_SEGMENT_THRESHOLD …
#define mmRLC_SPM_DBR0_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_DBR1_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_CBR0_PERFMON_SAMPLE_DELAY …
#define mmRLC_SPM_CBR1_PERFMON_SAMPLE_DELAY …
#define mmRLC_GPU_IOV_VF_ENABLE …
#define mmRLC_GPU_IOV_CFG_REG1 …
#define mmRLC_GPU_IOV_CFG_REG2 …
#define mmRLC_GPU_IOV_CFG_REG6 …
#define mmRLC_GPU_IOV_CFG_REG8 …
#define mmRLC_GPU_IOV_CFG_REG9 …
#define mmRLC_GPU_IOV_CFG_REG10 …
#define mmRLC_GPU_IOV_CFG_REG11 …
#define mmRLC_GPU_IOV_CFG_REG12 …
#define mmRLC_GPU_IOV_CFG_REG13 …
#define mmRLC_GPU_IOV_CFG_REG14 …
#define mmRLC_GPU_IOV_CFG_REG15 …
#define mmRLC_GPU_IOV_ACTIVE_FCN_ID …
#define mmRLC_GPM_VMID_THREAD2 …
#define mmRLC_GPU_IOV_UCODE_ADDR …
#define mmRLC_GPU_IOV_UCODE_DATA …
#define mmRLC_GPU_IOV_SCRATCH_ADDR …
#define mmRLC_GPU_IOV_SCRATCH_DATA …
#define mmRLC_GPU_IOV_F32_CNTL …
#define mmRLC_GPU_IOV_F32_RESET …
#define mmRLC_GPU_IOV_SDMA0_STATUS …
#define mmRLC_GPU_IOV_SDMA1_STATUS …
#define mmRLC_GPU_IOV_SMU_RESPONSE …
#define mmRLC_GPU_IOV_VIRT_RESET_REQ …
#define mmRLC_GPU_IOV_RLC_RESPONSE …
#define mmRLC_GPU_IOV_INT_DISABLE …
#define mmRLC_GPU_IOV_INT_FORCE …
#define mmRLC_GPU_IOV_SDMA0_BUSY_STATUS …
#define mmRLC_GPU_IOV_SDMA1_BUSY_STATUS …
#define mmRLC_GPU_IOV_SCH_0 …
#define mmRLC_GPU_IOV_SCH_1 …
#define mmRLC_GPU_IOV_SCH_2 …
#define mmRLC_GPU_IOV_SCH_3 …
#define mmRLC_GPU_IOV_SCH_INT …
#define mmSPI_PS_INPUT_CNTL_0 …
#define mmSPI_PS_INPUT_CNTL_1 …
#define mmSPI_PS_INPUT_CNTL_2 …
#define mmSPI_PS_INPUT_CNTL_3 …
#define mmSPI_PS_INPUT_CNTL_4 …
#define mmSPI_PS_INPUT_CNTL_5 …
#define mmSPI_PS_INPUT_CNTL_6 …
#define mmSPI_PS_INPUT_CNTL_7 …
#define mmSPI_PS_INPUT_CNTL_8 …
#define mmSPI_PS_INPUT_CNTL_9 …
#define mmSPI_PS_INPUT_CNTL_10 …
#define mmSPI_PS_INPUT_CNTL_11 …
#define mmSPI_PS_INPUT_CNTL_12 …
#define mmSPI_PS_INPUT_CNTL_13 …
#define mmSPI_PS_INPUT_CNTL_14 …
#define mmSPI_PS_INPUT_CNTL_15 …
#define mmSPI_PS_INPUT_CNTL_16 …
#define mmSPI_PS_INPUT_CNTL_17 …
#define mmSPI_PS_INPUT_CNTL_18 …
#define mmSPI_PS_INPUT_CNTL_19 …
#define mmSPI_PS_INPUT_CNTL_20 …
#define mmSPI_PS_INPUT_CNTL_21 …
#define mmSPI_PS_INPUT_CNTL_22 …
#define mmSPI_PS_INPUT_CNTL_23 …
#define mmSPI_PS_INPUT_CNTL_24 …
#define mmSPI_PS_INPUT_CNTL_25 …
#define mmSPI_PS_INPUT_CNTL_26 …
#define mmSPI_PS_INPUT_CNTL_27 …
#define mmSPI_PS_INPUT_CNTL_28 …
#define mmSPI_PS_INPUT_CNTL_29 …
#define mmSPI_PS_INPUT_CNTL_30 …
#define mmSPI_PS_INPUT_CNTL_31 …
#define mmSPI_VS_OUT_CONFIG …
#define mmSPI_PS_INPUT_ENA …
#define mmSPI_PS_INPUT_ADDR …
#define mmSPI_INTERP_CONTROL_0 …
#define mmSPI_PS_IN_CONTROL …
#define mmSPI_BARYC_CNTL …
#define mmSPI_TMPRING_SIZE …
#define mmSPI_SHADER_POS_FORMAT …
#define mmSPI_SHADER_Z_FORMAT …
#define mmSPI_SHADER_COL_FORMAT …
#define mmSPI_ARB_PRIORITY …
#define mmSPI_ARB_CYCLES_0 …
#define mmSPI_ARB_CYCLES_1 …
#define mmSPI_CDBG_SYS_GFX …
#define mmSPI_CDBG_SYS_HP3D …
#define mmSPI_CDBG_SYS_CS0 …
#define mmSPI_CDBG_SYS_CS1 …
#define mmSPI_WCL_PIPE_PERCENT_GFX …
#define mmSPI_WCL_PIPE_PERCENT_HP3D …
#define mmSPI_WCL_PIPE_PERCENT_CS0 …
#define mmSPI_WCL_PIPE_PERCENT_CS1 …
#define mmSPI_WCL_PIPE_PERCENT_CS2 …
#define mmSPI_WCL_PIPE_PERCENT_CS3 …
#define mmSPI_WCL_PIPE_PERCENT_CS4 …
#define mmSPI_WCL_PIPE_PERCENT_CS5 …
#define mmSPI_WCL_PIPE_PERCENT_CS6 …
#define mmSPI_WCL_PIPE_PERCENT_CS7 …
#define mmSPI_GDBG_WAVE_CNTL …
#define mmSPI_GDBG_TRAP_CONFIG …
#define mmSPI_GDBG_TRAP_MASK …
#define mmSPI_GDBG_TBA_LO …
#define mmSPI_GDBG_TBA_HI …
#define mmSPI_GDBG_TMA_LO …
#define mmSPI_GDBG_TMA_HI …
#define mmSPI_GDBG_TRAP_DATA0 …
#define mmSPI_GDBG_TRAP_DATA1 …
#define mmSPI_RESET_DEBUG …
#define mmSPI_COMPUTE_QUEUE_RESET …
#define mmSPI_RESOURCE_RESERVE_CU_0 …
#define mmSPI_RESOURCE_RESERVE_CU_1 …
#define mmSPI_RESOURCE_RESERVE_CU_2 …
#define mmSPI_RESOURCE_RESERVE_CU_3 …
#define mmSPI_RESOURCE_RESERVE_CU_4 …
#define mmSPI_RESOURCE_RESERVE_CU_5 …
#define mmSPI_RESOURCE_RESERVE_CU_6 …
#define mmSPI_RESOURCE_RESERVE_CU_7 …
#define mmSPI_RESOURCE_RESERVE_CU_8 …
#define mmSPI_RESOURCE_RESERVE_CU_9 …
#define mmSPI_RESOURCE_RESERVE_CU_10 …
#define mmSPI_RESOURCE_RESERVE_CU_11 …
#define mmSPI_RESOURCE_RESERVE_CU_12 …
#define mmSPI_RESOURCE_RESERVE_CU_13 …
#define mmSPI_RESOURCE_RESERVE_CU_14 …
#define mmSPI_RESOURCE_RESERVE_CU_15 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_0 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_1 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_2 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_3 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_4 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_5 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_6 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_7 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_8 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_9 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_10 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_11 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_12 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_13 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_14 …
#define mmSPI_RESOURCE_RESERVE_EN_CU_15 …
#define mmSPI_COMPUTE_WF_CTX_SAVE …
#define mmSPI_PS_MAX_WAVE_ID …
#define mmSPI_START_PHASE …
#define mmSPI_GFX_CNTL …
#define mmSPI_CONFIG_CNTL …
#define mmSPI_DEBUG_CNTL …
#define mmSPI_DEBUG_READ …
#define mmSPI_DSM_CNTL …
#define mmSPI_EDC_CNT …
#define mmSPI_PERFCOUNTER0_SELECT …
#define mmSPI_PERFCOUNTER1_SELECT …
#define mmSPI_PERFCOUNTER2_SELECT …
#define mmSPI_PERFCOUNTER3_SELECT …
#define mmSPI_PERFCOUNTER0_SELECT1 …
#define mmSPI_PERFCOUNTER1_SELECT1 …
#define mmSPI_PERFCOUNTER2_SELECT1 …
#define mmSPI_PERFCOUNTER3_SELECT1 …
#define mmSPI_PERFCOUNTER4_SELECT …
#define mmSPI_PERFCOUNTER5_SELECT …
#define mmSPI_PERFCOUNTER_BINS …
#define mmSPI_PERFCOUNTER0_HI …
#define mmSPI_PERFCOUNTER0_LO …
#define mmSPI_PERFCOUNTER1_HI …
#define mmSPI_PERFCOUNTER1_LO …
#define mmSPI_PERFCOUNTER2_HI …
#define mmSPI_PERFCOUNTER2_LO …
#define mmSPI_PERFCOUNTER3_HI …
#define mmSPI_PERFCOUNTER3_LO …
#define mmSPI_PERFCOUNTER4_HI …
#define mmSPI_PERFCOUNTER4_LO …
#define mmSPI_PERFCOUNTER5_HI …
#define mmSPI_PERFCOUNTER5_LO …
#define mmSPI_CONFIG_CNTL_1 …
#define mmSPI_DEBUG_BUSY …
#define mmSPI_CONFIG_CNTL_2 …
#define mmCGTS_SM_CTRL_REG …
#define mmCGTS_RD_CTRL_REG …
#define mmCGTS_RD_REG …
#define mmCGTS_TCC_DISABLE …
#define mmCGTS_USER_TCC_DISABLE …
#define mmCGTS_CU0_SP0_CTRL_REG …
#define mmCGTS_CU0_LDS_SQ_CTRL_REG …
#define mmCGTS_CU0_TA_SQC_CTRL_REG …
#define mmCGTS_CU0_SP1_CTRL_REG …
#define mmCGTS_CU0_TD_TCP_CTRL_REG …
#define mmCGTS_CU1_SP0_CTRL_REG …
#define mmCGTS_CU1_LDS_SQ_CTRL_REG …
#define mmCGTS_CU1_TA_CTRL_REG …
#define mmCGTS_CU1_SP1_CTRL_REG …
#define mmCGTS_CU1_TD_TCP_CTRL_REG …
#define mmCGTS_CU2_SP0_CTRL_REG …
#define mmCGTS_CU2_LDS_SQ_CTRL_REG …
#define mmCGTS_CU2_TA_CTRL_REG …
#define mmCGTS_CU2_SP1_CTRL_REG …
#define mmCGTS_CU2_TD_TCP_CTRL_REG …
#define mmCGTS_CU3_SP0_CTRL_REG …
#define mmCGTS_CU3_LDS_SQ_CTRL_REG …
#define mmCGTS_CU3_TA_CTRL_REG …
#define mmCGTS_CU3_SP1_CTRL_REG …
#define mmCGTS_CU3_TD_TCP_CTRL_REG …
#define mmCGTS_CU4_SP0_CTRL_REG …
#define mmCGTS_CU4_LDS_SQ_CTRL_REG …
#define mmCGTS_CU4_TA_SQC_CTRL_REG …
#define mmCGTS_CU4_SP1_CTRL_REG …
#define mmCGTS_CU4_TD_TCP_CTRL_REG …
#define mmCGTS_CU5_SP0_CTRL_REG …
#define mmCGTS_CU5_LDS_SQ_CTRL_REG …
#define mmCGTS_CU5_TA_CTRL_REG …
#define mmCGTS_CU5_SP1_CTRL_REG …
#define mmCGTS_CU5_TD_TCP_CTRL_REG …
#define mmCGTS_CU6_SP0_CTRL_REG …
#define mmCGTS_CU6_LDS_SQ_CTRL_REG …
#define mmCGTS_CU6_TA_CTRL_REG …
#define mmCGTS_CU6_SP1_CTRL_REG …
#define mmCGTS_CU6_TD_TCP_CTRL_REG …
#define mmCGTS_CU7_SP0_CTRL_REG …
#define mmCGTS_CU7_LDS_SQ_CTRL_REG …
#define mmCGTS_CU7_TA_CTRL_REG …
#define mmCGTS_CU7_SP1_CTRL_REG …
#define mmCGTS_CU7_TD_TCP_CTRL_REG …
#define mmCGTS_CU8_SP0_CTRL_REG …
#define mmCGTS_CU8_LDS_SQ_CTRL_REG …
#define mmCGTS_CU8_TA_SQC_CTRL_REG …
#define mmCGTS_CU8_SP1_CTRL_REG …
#define mmCGTS_CU8_TD_TCP_CTRL_REG …
#define mmCGTS_CU9_SP0_CTRL_REG …
#define mmCGTS_CU9_LDS_SQ_CTRL_REG …
#define mmCGTS_CU9_TA_CTRL_REG …
#define mmCGTS_CU9_SP1_CTRL_REG …
#define mmCGTS_CU9_TD_TCP_CTRL_REG …
#define mmCGTS_CU10_SP0_CTRL_REG …
#define mmCGTS_CU10_LDS_SQ_CTRL_REG …
#define mmCGTS_CU10_TA_CTRL_REG …
#define mmCGTS_CU10_SP1_CTRL_REG …
#define mmCGTS_CU10_TD_TCP_CTRL_REG …
#define mmCGTS_CU11_SP0_CTRL_REG …
#define mmCGTS_CU11_LDS_SQ_CTRL_REG …
#define mmCGTS_CU11_TA_CTRL_REG …
#define mmCGTS_CU11_SP1_CTRL_REG …
#define mmCGTS_CU11_TD_TCP_CTRL_REG …
#define mmCGTS_CU12_SP0_CTRL_REG …
#define mmCGTS_CU12_LDS_SQ_CTRL_REG …
#define mmCGTS_CU12_TA_SQC_CTRL_REG …
#define mmCGTS_CU12_SP1_CTRL_REG …
#define mmCGTS_CU12_TD_TCP_CTRL_REG …
#define mmCGTS_CU13_SP0_CTRL_REG …
#define mmCGTS_CU13_LDS_SQ_CTRL_REG …
#define mmCGTS_CU13_TA_CTRL_REG …
#define mmCGTS_CU13_SP1_CTRL_REG …
#define mmCGTS_CU13_TD_TCP_CTRL_REG …
#define mmCGTS_CU14_SP0_CTRL_REG …
#define mmCGTS_CU14_LDS_SQ_CTRL_REG …
#define mmCGTS_CU14_TA_CTRL_REG …
#define mmCGTS_CU14_SP1_CTRL_REG …
#define mmCGTS_CU14_TD_TCP_CTRL_REG …
#define mmCGTS_CU15_SP0_CTRL_REG …
#define mmCGTS_CU15_LDS_SQ_CTRL_REG …
#define mmCGTS_CU15_TA_CTRL_REG …
#define mmCGTS_CU15_SP1_CTRL_REG …
#define mmCGTS_CU15_TD_TCP_CTRL_REG …
#define mmCGTT_SPI_CLK_CTRL …
#define mmCGTT_PC_CLK_CTRL …
#define mmCGTT_BCI_CLK_CTRL …
#define mmSPI_WF_LIFETIME_CNTL …
#define mmSPI_WF_LIFETIME_LIMIT_0 …
#define mmSPI_WF_LIFETIME_LIMIT_1 …
#define mmSPI_WF_LIFETIME_LIMIT_2 …
#define mmSPI_WF_LIFETIME_LIMIT_3 …
#define mmSPI_WF_LIFETIME_LIMIT_4 …
#define mmSPI_WF_LIFETIME_LIMIT_5 …
#define mmSPI_WF_LIFETIME_LIMIT_6 …
#define mmSPI_WF_LIFETIME_LIMIT_7 …
#define mmSPI_WF_LIFETIME_LIMIT_8 …
#define mmSPI_WF_LIFETIME_LIMIT_9 …
#define mmSPI_WF_LIFETIME_STATUS_0 …
#define mmSPI_WF_LIFETIME_STATUS_1 …
#define mmSPI_WF_LIFETIME_STATUS_2 …
#define mmSPI_WF_LIFETIME_STATUS_3 …
#define mmSPI_WF_LIFETIME_STATUS_4 …
#define mmSPI_WF_LIFETIME_STATUS_5 …
#define mmSPI_WF_LIFETIME_STATUS_6 …
#define mmSPI_WF_LIFETIME_STATUS_7 …
#define mmSPI_WF_LIFETIME_STATUS_8 …
#define mmSPI_WF_LIFETIME_STATUS_9 …
#define mmSPI_WF_LIFETIME_STATUS_10 …
#define mmSPI_WF_LIFETIME_STATUS_11 …
#define mmSPI_WF_LIFETIME_STATUS_12 …
#define mmSPI_WF_LIFETIME_STATUS_13 …
#define mmSPI_WF_LIFETIME_STATUS_14 …
#define mmSPI_WF_LIFETIME_STATUS_15 …
#define mmSPI_WF_LIFETIME_STATUS_16 …
#define mmSPI_WF_LIFETIME_STATUS_17 …
#define mmSPI_WF_LIFETIME_STATUS_18 …
#define mmSPI_WF_LIFETIME_STATUS_19 …
#define mmSPI_WF_LIFETIME_STATUS_20 …
#define mmSPI_WF_LIFETIME_DEBUG …
#define mmSPI_SLAVE_DEBUG_BUSY …
#define mmSPI_LB_CTR_CTRL …
#define mmSPI_LB_CU_MASK …
#define mmSPI_LB_DATA_REG …
#define mmSPI_PG_ENABLE_STATIC_CU_MASK …
#define mmSPI_GDS_CREDITS …
#define mmSPI_SX_EXPORT_BUFFER_SIZES …
#define mmSPI_SX_SCOREBOARD_BUFFER_SIZES …
#define mmSPI_CSQ_WF_ACTIVE_STATUS …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_0 …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_1 …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_2 …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_3 …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_4 …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_5 …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_6 …
#define mmSPI_CSQ_WF_ACTIVE_COUNT_7 …
#define mmBCI_DEBUG_READ …
#define mmSPI_P0_TRAP_SCREEN_PSBA_LO …
#define mmSPI_P0_TRAP_SCREEN_PSBA_HI …
#define mmSPI_P0_TRAP_SCREEN_PSMA_LO …
#define mmSPI_P0_TRAP_SCREEN_PSMA_HI …
#define mmSPI_P0_TRAP_SCREEN_GPR_MIN …
#define mmSPI_P1_TRAP_SCREEN_PSBA_LO …
#define mmSPI_P1_TRAP_SCREEN_PSBA_HI …
#define mmSPI_P1_TRAP_SCREEN_PSMA_LO …
#define mmSPI_P1_TRAP_SCREEN_PSMA_HI …
#define mmSPI_P1_TRAP_SCREEN_GPR_MIN …
#define mmSPI_SHADER_TBA_LO_PS …
#define mmSPI_SHADER_TBA_HI_PS …
#define mmSPI_SHADER_TMA_LO_PS …
#define mmSPI_SHADER_TMA_HI_PS …
#define mmSPI_SHADER_PGM_LO_PS …
#define mmSPI_SHADER_PGM_HI_PS …
#define mmSPI_SHADER_PGM_RSRC1_PS …
#define mmSPI_SHADER_PGM_RSRC2_PS …
#define mmSPI_SHADER_PGM_RSRC3_PS …
#define mmSPI_SHADER_USER_DATA_PS_0 …
#define mmSPI_SHADER_USER_DATA_PS_1 …
#define mmSPI_SHADER_USER_DATA_PS_2 …
#define mmSPI_SHADER_USER_DATA_PS_3 …
#define mmSPI_SHADER_USER_DATA_PS_4 …
#define mmSPI_SHADER_USER_DATA_PS_5 …
#define mmSPI_SHADER_USER_DATA_PS_6 …
#define mmSPI_SHADER_USER_DATA_PS_7 …
#define mmSPI_SHADER_USER_DATA_PS_8 …
#define mmSPI_SHADER_USER_DATA_PS_9 …
#define mmSPI_SHADER_USER_DATA_PS_10 …
#define mmSPI_SHADER_USER_DATA_PS_11 …
#define mmSPI_SHADER_USER_DATA_PS_12 …
#define mmSPI_SHADER_USER_DATA_PS_13 …
#define mmSPI_SHADER_USER_DATA_PS_14 …
#define mmSPI_SHADER_USER_DATA_PS_15 …
#define mmSPI_SHADER_TBA_LO_VS …
#define mmSPI_SHADER_TBA_HI_VS …
#define mmSPI_SHADER_TMA_LO_VS …
#define mmSPI_SHADER_TMA_HI_VS …
#define mmSPI_SHADER_PGM_LO_VS …
#define mmSPI_SHADER_PGM_HI_VS …
#define mmSPI_SHADER_PGM_RSRC1_VS …
#define mmSPI_SHADER_PGM_RSRC2_VS …
#define mmSPI_SHADER_PGM_RSRC3_VS …
#define mmSPI_SHADER_LATE_ALLOC_VS …
#define mmSPI_SHADER_USER_DATA_VS_0 …
#define mmSPI_SHADER_USER_DATA_VS_1 …
#define mmSPI_SHADER_USER_DATA_VS_2 …
#define mmSPI_SHADER_USER_DATA_VS_3 …
#define mmSPI_SHADER_USER_DATA_VS_4 …
#define mmSPI_SHADER_USER_DATA_VS_5 …
#define mmSPI_SHADER_USER_DATA_VS_6 …
#define mmSPI_SHADER_USER_DATA_VS_7 …
#define mmSPI_SHADER_USER_DATA_VS_8 …
#define mmSPI_SHADER_USER_DATA_VS_9 …
#define mmSPI_SHADER_USER_DATA_VS_10 …
#define mmSPI_SHADER_USER_DATA_VS_11 …
#define mmSPI_SHADER_USER_DATA_VS_12 …
#define mmSPI_SHADER_USER_DATA_VS_13 …
#define mmSPI_SHADER_USER_DATA_VS_14 …
#define mmSPI_SHADER_USER_DATA_VS_15 …
#define mmSPI_SHADER_PGM_RSRC2_ES_VS …
#define mmSPI_SHADER_PGM_RSRC2_LS_VS …
#define mmSPI_SHADER_TBA_LO_GS …
#define mmSPI_SHADER_TBA_HI_GS …
#define mmSPI_SHADER_TMA_LO_GS …
#define mmSPI_SHADER_TMA_HI_GS …
#define mmSPI_SHADER_PGM_LO_GS …
#define mmSPI_SHADER_PGM_HI_GS …
#define mmSPI_SHADER_PGM_RSRC1_GS …
#define mmSPI_SHADER_PGM_RSRC2_GS …
#define mmSPI_SHADER_PGM_RSRC3_GS …
#define mmSPI_SHADER_USER_DATA_GS_0 …
#define mmSPI_SHADER_USER_DATA_GS_1 …
#define mmSPI_SHADER_USER_DATA_GS_2 …
#define mmSPI_SHADER_USER_DATA_GS_3 …
#define mmSPI_SHADER_USER_DATA_GS_4 …
#define mmSPI_SHADER_USER_DATA_GS_5 …
#define mmSPI_SHADER_USER_DATA_GS_6 …
#define mmSPI_SHADER_USER_DATA_GS_7 …
#define mmSPI_SHADER_USER_DATA_GS_8 …
#define mmSPI_SHADER_USER_DATA_GS_9 …
#define mmSPI_SHADER_USER_DATA_GS_10 …
#define mmSPI_SHADER_USER_DATA_GS_11 …
#define mmSPI_SHADER_USER_DATA_GS_12 …
#define mmSPI_SHADER_USER_DATA_GS_13 …
#define mmSPI_SHADER_USER_DATA_GS_14 …
#define mmSPI_SHADER_USER_DATA_GS_15 …
#define mmSPI_SHADER_PGM_RSRC2_ES_GS …
#define mmSPI_SHADER_TBA_LO_ES …
#define mmSPI_SHADER_TBA_HI_ES …
#define mmSPI_SHADER_TMA_LO_ES …
#define mmSPI_SHADER_TMA_HI_ES …
#define mmSPI_SHADER_PGM_LO_ES …
#define mmSPI_SHADER_PGM_HI_ES …
#define mmSPI_SHADER_PGM_RSRC1_ES …
#define mmSPI_SHADER_PGM_RSRC2_ES …
#define mmSPI_SHADER_PGM_RSRC3_ES …
#define mmSPI_SHADER_USER_DATA_ES_0 …
#define mmSPI_SHADER_USER_DATA_ES_1 …
#define mmSPI_SHADER_USER_DATA_ES_2 …
#define mmSPI_SHADER_USER_DATA_ES_3 …
#define mmSPI_SHADER_USER_DATA_ES_4 …
#define mmSPI_SHADER_USER_DATA_ES_5 …
#define mmSPI_SHADER_USER_DATA_ES_6 …
#define mmSPI_SHADER_USER_DATA_ES_7 …
#define mmSPI_SHADER_USER_DATA_ES_8 …
#define mmSPI_SHADER_USER_DATA_ES_9 …
#define mmSPI_SHADER_USER_DATA_ES_10 …
#define mmSPI_SHADER_USER_DATA_ES_11 …
#define mmSPI_SHADER_USER_DATA_ES_12 …
#define mmSPI_SHADER_USER_DATA_ES_13 …
#define mmSPI_SHADER_USER_DATA_ES_14 …
#define mmSPI_SHADER_USER_DATA_ES_15 …
#define mmSPI_SHADER_PGM_RSRC2_LS_ES …
#define mmSPI_SHADER_TBA_LO_HS …
#define mmSPI_SHADER_TBA_HI_HS …
#define mmSPI_SHADER_TMA_LO_HS …
#define mmSPI_SHADER_TMA_HI_HS …
#define mmSPI_SHADER_PGM_LO_HS …
#define mmSPI_SHADER_PGM_HI_HS …
#define mmSPI_SHADER_PGM_RSRC1_HS …
#define mmSPI_SHADER_PGM_RSRC2_HS …
#define mmSPI_SHADER_PGM_RSRC3_HS …
#define mmSPI_SHADER_USER_DATA_HS_0 …
#define mmSPI_SHADER_USER_DATA_HS_1 …
#define mmSPI_SHADER_USER_DATA_HS_2 …
#define mmSPI_SHADER_USER_DATA_HS_3 …
#define mmSPI_SHADER_USER_DATA_HS_4 …
#define mmSPI_SHADER_USER_DATA_HS_5 …
#define mmSPI_SHADER_USER_DATA_HS_6 …
#define mmSPI_SHADER_USER_DATA_HS_7 …
#define mmSPI_SHADER_USER_DATA_HS_8 …
#define mmSPI_SHADER_USER_DATA_HS_9 …
#define mmSPI_SHADER_USER_DATA_HS_10 …
#define mmSPI_SHADER_USER_DATA_HS_11 …
#define mmSPI_SHADER_USER_DATA_HS_12 …
#define mmSPI_SHADER_USER_DATA_HS_13 …
#define mmSPI_SHADER_USER_DATA_HS_14 …
#define mmSPI_SHADER_USER_DATA_HS_15 …
#define mmSPI_SHADER_PGM_RSRC2_LS_HS …
#define mmSPI_SHADER_TBA_LO_LS …
#define mmSPI_SHADER_TBA_HI_LS …
#define mmSPI_SHADER_TMA_LO_LS …
#define mmSPI_SHADER_TMA_HI_LS …
#define mmSPI_SHADER_PGM_LO_LS …
#define mmSPI_SHADER_PGM_HI_LS …
#define mmSPI_SHADER_PGM_RSRC1_LS …
#define mmSPI_SHADER_PGM_RSRC2_LS …
#define mmSPI_SHADER_PGM_RSRC3_LS …
#define mmSPI_SHADER_USER_DATA_LS_0 …
#define mmSPI_SHADER_USER_DATA_LS_1 …
#define mmSPI_SHADER_USER_DATA_LS_2 …
#define mmSPI_SHADER_USER_DATA_LS_3 …
#define mmSPI_SHADER_USER_DATA_LS_4 …
#define mmSPI_SHADER_USER_DATA_LS_5 …
#define mmSPI_SHADER_USER_DATA_LS_6 …
#define mmSPI_SHADER_USER_DATA_LS_7 …
#define mmSPI_SHADER_USER_DATA_LS_8 …
#define mmSPI_SHADER_USER_DATA_LS_9 …
#define mmSPI_SHADER_USER_DATA_LS_10 …
#define mmSPI_SHADER_USER_DATA_LS_11 …
#define mmSPI_SHADER_USER_DATA_LS_12 …
#define mmSPI_SHADER_USER_DATA_LS_13 …
#define mmSPI_SHADER_USER_DATA_LS_14 …
#define mmSPI_SHADER_USER_DATA_LS_15 …
#define mmSQ_CONFIG …
#define mmSQC_CONFIG …
#define mmSQC_CACHES …
#define mmSQC_WRITEBACK …
#define mmSQC_DSM_CNTL …
#define mmSQ_RANDOM_WAVE_PRI …
#define mmSQ_REG_CREDITS …
#define mmSQ_FIFO_SIZES …
#define mmSQ_DSM_CNTL …
#define mmCC_GC_SHADER_RATE_CONFIG …
#define mmGC_USER_SHADER_RATE_CONFIG …
#define mmSQ_INTERRUPT_AUTO_MASK …
#define mmSQ_INTERRUPT_MSG_CTRL …
#define mmSQ_PERFCOUNTER_CTRL …
#define mmSQ_PERFCOUNTER_MASK …
#define mmSQ_PERFCOUNTER_CTRL2 …
#define mmCC_SQC_BANK_DISABLE …
#define mmUSER_SQC_BANK_DISABLE …
#define mmSQ_PERFCOUNTER0_LO …
#define mmSQ_PERFCOUNTER1_LO …
#define mmSQ_PERFCOUNTER2_LO …
#define mmSQ_PERFCOUNTER3_LO …
#define mmSQ_PERFCOUNTER4_LO …
#define mmSQ_PERFCOUNTER5_LO …
#define mmSQ_PERFCOUNTER6_LO …
#define mmSQ_PERFCOUNTER7_LO …
#define mmSQ_PERFCOUNTER8_LO …
#define mmSQ_PERFCOUNTER9_LO …
#define mmSQ_PERFCOUNTER10_LO …
#define mmSQ_PERFCOUNTER11_LO …
#define mmSQ_PERFCOUNTER12_LO …
#define mmSQ_PERFCOUNTER13_LO …
#define mmSQ_PERFCOUNTER14_LO …
#define mmSQ_PERFCOUNTER15_LO …
#define mmSQ_PERFCOUNTER0_HI …
#define mmSQ_PERFCOUNTER1_HI …
#define mmSQ_PERFCOUNTER2_HI …
#define mmSQ_PERFCOUNTER3_HI …
#define mmSQ_PERFCOUNTER4_HI …
#define mmSQ_PERFCOUNTER5_HI …
#define mmSQ_PERFCOUNTER6_HI …
#define mmSQ_PERFCOUNTER7_HI …
#define mmSQ_PERFCOUNTER8_HI …
#define mmSQ_PERFCOUNTER9_HI …
#define mmSQ_PERFCOUNTER10_HI …
#define mmSQ_PERFCOUNTER11_HI …
#define mmSQ_PERFCOUNTER12_HI …
#define mmSQ_PERFCOUNTER13_HI …
#define mmSQ_PERFCOUNTER14_HI …
#define mmSQ_PERFCOUNTER15_HI …
#define mmSQ_PERFCOUNTER0_SELECT …
#define mmSQ_PERFCOUNTER1_SELECT …
#define mmSQ_PERFCOUNTER2_SELECT …
#define mmSQ_PERFCOUNTER3_SELECT …
#define mmSQ_PERFCOUNTER4_SELECT …
#define mmSQ_PERFCOUNTER5_SELECT …
#define mmSQ_PERFCOUNTER6_SELECT …
#define mmSQ_PERFCOUNTER7_SELECT …
#define mmSQ_PERFCOUNTER8_SELECT …
#define mmSQ_PERFCOUNTER9_SELECT …
#define mmSQ_PERFCOUNTER10_SELECT …
#define mmSQ_PERFCOUNTER11_SELECT …
#define mmSQ_PERFCOUNTER12_SELECT …
#define mmSQ_PERFCOUNTER13_SELECT …
#define mmSQ_PERFCOUNTER14_SELECT …
#define mmSQ_PERFCOUNTER15_SELECT …
#define mmCGTT_SQ_CLK_CTRL …
#define mmCGTT_SQG_CLK_CTRL …
#define mmSQ_ALU_CLK_CTRL …
#define mmSQ_TEX_CLK_CTRL …
#define mmSQ_LDS_CLK_CTRL …
#define mmSQ_POWER_THROTTLE …
#define mmSQ_POWER_THROTTLE2 …
#define mmSQ_TIME_HI …
#define mmSQ_TIME_LO …
#define mmSQ_THREAD_TRACE_BASE …
#define mmSQ_THREAD_TRACE_BASE2 …
#define mmSQ_THREAD_TRACE_SIZE …
#define mmSQ_THREAD_TRACE_MASK …
#define mmSQ_THREAD_TRACE_USERDATA_0 …
#define mmSQ_THREAD_TRACE_USERDATA_1 …
#define mmSQ_THREAD_TRACE_USERDATA_2 …
#define mmSQ_THREAD_TRACE_USERDATA_3 …
#define mmSQ_THREAD_TRACE_MODE …
#define mmSQ_THREAD_TRACE_CTRL …
#define mmSQ_THREAD_TRACE_TOKEN_MASK …
#define mmSQ_THREAD_TRACE_TOKEN_MASK2 …
#define mmSQ_THREAD_TRACE_PERF_MASK …
#define mmSQ_THREAD_TRACE_WPTR …
#define mmSQ_THREAD_TRACE_STATUS …
#define mmSQ_THREAD_TRACE_CNTR …
#define mmSQ_THREAD_TRACE_HIWATER …
#define mmSQ_LB_CTR_CTRL …
#define mmSQ_LB_DATA_ALU_CYCLES …
#define mmSQ_LB_DATA_TEX_CYCLES …
#define mmSQ_LB_DATA_ALU_STALLS …
#define mmSQ_LB_DATA_TEX_STALLS …
#define mmSQC_EDC_CNT …
#define mmSQ_EDC_SEC_CNT …
#define mmSQ_EDC_DED_CNT …
#define mmSQ_EDC_INFO …
#define mmSQ_BUF_RSRC_WORD0 …
#define mmSQ_BUF_RSRC_WORD1 …
#define mmSQ_BUF_RSRC_WORD2 …
#define mmSQ_BUF_RSRC_WORD3 …
#define mmSQ_IMG_RSRC_WORD0 …
#define mmSQ_IMG_RSRC_WORD1 …
#define mmSQ_IMG_RSRC_WORD2 …
#define mmSQ_IMG_RSRC_WORD3 …
#define mmSQ_IMG_RSRC_WORD4 …
#define mmSQ_IMG_RSRC_WORD5 …
#define mmSQ_IMG_RSRC_WORD6 …
#define mmSQ_IMG_RSRC_WORD7 …
#define mmSQ_IMG_SAMP_WORD0 …
#define mmSQ_IMG_SAMP_WORD1 …
#define mmSQ_IMG_SAMP_WORD2 …
#define mmSQ_IMG_SAMP_WORD3 …
#define mmSQ_FLAT_SCRATCH_WORD0 …
#define mmSQ_FLAT_SCRATCH_WORD1 …
#define mmSQ_M0_GPR_IDX_WORD …
#define mmSQ_IND_INDEX …
#define mmSQ_CMD …
#define mmSQ_IND_DATA …
#define mmSQ_REG_TIMESTAMP …
#define mmSQ_CMD_TIMESTAMP …
#define mmSQ_HV_VMID_CTRL …
#define ixSQ_WAVE_INST_DW0 …
#define ixSQ_WAVE_INST_DW1 …
#define ixSQ_WAVE_PC_LO …
#define ixSQ_WAVE_PC_HI …
#define ixSQ_WAVE_IB_DBG0 …
#define ixSQ_WAVE_IB_DBG1 …
#define ixSQ_WAVE_EXEC_LO …
#define ixSQ_WAVE_EXEC_HI …
#define ixSQ_WAVE_STATUS …
#define ixSQ_WAVE_MODE …
#define ixSQ_WAVE_TRAPSTS …
#define ixSQ_WAVE_HW_ID …
#define ixSQ_WAVE_GPR_ALLOC …
#define ixSQ_WAVE_LDS_ALLOC …
#define ixSQ_WAVE_IB_STS …
#define ixSQ_WAVE_M0 …
#define ixSQ_WAVE_TBA_LO …
#define ixSQ_WAVE_TBA_HI …
#define ixSQ_WAVE_TMA_LO …
#define ixSQ_WAVE_TMA_HI …
#define ixSQ_WAVE_TTMP0 …
#define ixSQ_WAVE_TTMP1 …
#define ixSQ_WAVE_TTMP2 …
#define ixSQ_WAVE_TTMP3 …
#define ixSQ_WAVE_TTMP4 …
#define ixSQ_WAVE_TTMP5 …
#define ixSQ_WAVE_TTMP6 …
#define ixSQ_WAVE_TTMP7 …
#define ixSQ_WAVE_TTMP8 …
#define ixSQ_WAVE_TTMP9 …
#define ixSQ_WAVE_TTMP10 …
#define ixSQ_WAVE_TTMP11 …
#define mmSQ_DEBUG_STS_GLOBAL …
#define mmSQ_DEBUG_STS_GLOBAL2 …
#define mmSQ_DEBUG_STS_GLOBAL3 …
#define ixSQ_DEBUG_STS_LOCAL …
#define ixSQ_DEBUG_CTRL_LOCAL …
#define mmSH_MEM_BASES …
#define mmSH_MEM_APE1_BASE …
#define mmSH_MEM_APE1_LIMIT …
#define mmSH_MEM_CONFIG …
#define mmSQ_THREAD_TRACE_WORD_CMN …
#define mmSQ_THREAD_TRACE_WORD_INST …
#define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_WAVE …
#define mmSQ_THREAD_TRACE_WORD_MISC …
#define mmSQ_THREAD_TRACE_WORD_WAVE_START …
#define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_REG_CS_1_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_REG_CS_2_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_EVENT …
#define mmSQ_THREAD_TRACE_WORD_ISSUE …
#define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2 …
#define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2 …
#define mmSQ_WREXEC_EXEC_LO …
#define mmSQ_WREXEC_EXEC_HI …
#define mmSQC_GATCL1_CNTL …
#define mmSQC_ATC_EDC_GATCL1_CNT …
#define ixSQ_INTERRUPT_WORD_CMN …
#define ixSQ_INTERRUPT_WORD_AUTO …
#define ixSQ_INTERRUPT_WORD_WAVE …
#define mmSQ_SOP2 …
#define mmSQ_VOP1 …
#define mmSQ_MTBUF_1 …
#define mmSQ_EXP_1 …
#define mmSQ_MUBUF_1 …
#define mmSQ_SMEM_1 …
#define mmSQ_INST …
#define mmSQ_EXP_0 …
#define mmSQ_MUBUF_0 …
#define mmSQ_VOP_SDWA …
#define mmSQ_VOP3_0 …
#define mmSQ_VOP2 …
#define mmSQ_MTBUF_0 …
#define mmSQ_SOPP …
#define mmSQ_FLAT_0 …
#define mmSQ_VOP3_0_SDST_ENC …
#define mmSQ_MIMG_1 …
#define mmSQ_SOP1 …
#define mmSQ_SOPC …
#define mmSQ_FLAT_1 …
#define mmSQ_DS_1 …
#define mmSQ_VOP3_1 …
#define mmSQ_SMEM_0 …
#define mmSQ_MIMG_0 …
#define mmSQ_SOPK …
#define mmSQ_DS_0 …
#define mmSQ_VOP_DPP …
#define mmSQ_VOPC …
#define mmSQ_VINTRP …
#define mmCGTT_SX_CLK_CTRL0 …
#define mmCGTT_SX_CLK_CTRL1 …
#define mmCGTT_SX_CLK_CTRL2 …
#define mmCGTT_SX_CLK_CTRL3 …
#define mmCGTT_SX_CLK_CTRL4 …
#define mmSX_DEBUG_BUSY …
#define mmSX_DEBUG_BUSY_2 …
#define mmSX_DEBUG_BUSY_3 …
#define mmSX_DEBUG_BUSY_4 …
#define mmSX_DEBUG_1 …
#define mmSX_PERFCOUNTER0_SELECT …
#define mmSX_PERFCOUNTER1_SELECT …
#define mmSX_PERFCOUNTER2_SELECT …
#define mmSX_PERFCOUNTER3_SELECT …
#define mmSX_PERFCOUNTER0_SELECT1 …
#define mmSX_PERFCOUNTER1_SELECT1 …
#define mmSX_PERFCOUNTER0_LO …
#define mmSX_PERFCOUNTER0_HI …
#define mmSX_PERFCOUNTER1_LO …
#define mmSX_PERFCOUNTER1_HI …
#define mmSX_PERFCOUNTER2_LO …
#define mmSX_PERFCOUNTER2_HI …
#define mmSX_PERFCOUNTER3_LO …
#define mmSX_PERFCOUNTER3_HI …
#define mmTCC_CTRL …
#define mmTCC_EDC_CNT …
#define mmTCC_REDUNDANCY …
#define mmTCC_EXE_DISABLE …
#define mmTCC_DSM_CNTL …
#define mmTCC_CGTT_SCLK_CTRL …
#define mmTCA_CGTT_SCLK_CTRL …
#define mmTCC_PERFCOUNTER0_SELECT …
#define mmTCC_PERFCOUNTER1_SELECT …
#define mmTCC_PERFCOUNTER0_SELECT1 …
#define mmTCC_PERFCOUNTER1_SELECT1 …
#define mmTCC_PERFCOUNTER2_SELECT …
#define mmTCC_PERFCOUNTER3_SELECT …
#define mmTCC_PERFCOUNTER0_LO …
#define mmTCC_PERFCOUNTER1_LO …
#define mmTCC_PERFCOUNTER2_LO …
#define mmTCC_PERFCOUNTER3_LO …
#define mmTCC_PERFCOUNTER0_HI …
#define mmTCC_PERFCOUNTER1_HI …
#define mmTCC_PERFCOUNTER2_HI …
#define mmTCC_PERFCOUNTER3_HI …
#define mmTCA_CTRL …
#define mmTCA_PERFCOUNTER0_SELECT …
#define mmTCA_PERFCOUNTER1_SELECT …
#define mmTCA_PERFCOUNTER0_SELECT1 …
#define mmTCA_PERFCOUNTER1_SELECT1 …
#define mmTCA_PERFCOUNTER2_SELECT …
#define mmTCA_PERFCOUNTER3_SELECT …
#define mmTCA_PERFCOUNTER0_LO …
#define mmTCA_PERFCOUNTER1_LO …
#define mmTCA_PERFCOUNTER2_LO …
#define mmTCA_PERFCOUNTER3_LO …
#define mmTCA_PERFCOUNTER0_HI …
#define mmTCA_PERFCOUNTER1_HI …
#define mmTCA_PERFCOUNTER2_HI …
#define mmTCA_PERFCOUNTER3_HI …
#define mmTA_BC_BASE_ADDR …
#define mmTA_BC_BASE_ADDR_HI …
#define mmTD_CNTL …
#define mmTD_STATUS …
#define mmTD_DEBUG_INDEX …
#define mmTD_DEBUG_DATA …
#define mmTD_DSM_CNTL …
#define mmTD_PERFCOUNTER0_SELECT …
#define mmTD_PERFCOUNTER1_SELECT …
#define mmTD_PERFCOUNTER0_SELECT1 …
#define mmTD_PERFCOUNTER0_LO …
#define mmTD_PERFCOUNTER1_LO …
#define mmTD_PERFCOUNTER0_HI …
#define mmTD_PERFCOUNTER1_HI …
#define mmTD_SCRATCH …
#define mmTA_CNTL …
#define mmTA_CNTL_AUX …
#define mmTA_RESERVED_010C …
#define mmTA_CS_BC_BASE_ADDR …
#define mmTA_CS_BC_BASE_ADDR_HI …
#define mmTA_STATUS …
#define mmTA_DEBUG_INDEX …
#define mmTA_DEBUG_DATA …
#define mmTA_PERFCOUNTER0_SELECT …
#define mmTA_PERFCOUNTER1_SELECT …
#define mmTA_PERFCOUNTER0_SELECT1 …
#define mmTA_PERFCOUNTER0_LO …
#define mmTA_PERFCOUNTER1_LO …
#define mmTA_PERFCOUNTER0_HI …
#define mmTA_PERFCOUNTER1_HI …
#define mmTA_SCRATCH …
#define mmSH_HIDDEN_PRIVATE_BASE_VMID …
#define mmSH_STATIC_MEM_CONFIG …
#define mmTCP_INVALIDATE …
#define mmTCP_STATUS …
#define mmTCP_CNTL …
#define mmTCP_CHAN_STEER_LO …
#define mmTCP_CHAN_STEER_HI …
#define mmTCP_ADDR_CONFIG …
#define mmTCP_CREDIT …
#define mmTCP_PERFCOUNTER0_SELECT …
#define mmTCP_PERFCOUNTER1_SELECT …
#define mmTCP_PERFCOUNTER0_SELECT1 …
#define mmTCP_PERFCOUNTER1_SELECT1 …
#define mmTCP_PERFCOUNTER2_SELECT …
#define mmTCP_PERFCOUNTER3_SELECT …
#define mmTCP_PERFCOUNTER0_LO …
#define mmTCP_PERFCOUNTER1_LO …
#define mmTCP_PERFCOUNTER2_LO …
#define mmTCP_PERFCOUNTER3_LO …
#define mmTCP_PERFCOUNTER0_HI …
#define mmTCP_PERFCOUNTER1_HI …
#define mmTCP_PERFCOUNTER2_HI …
#define mmTCP_PERFCOUNTER3_HI …
#define mmTCP_BUFFER_ADDR_HASH_CNTL …
#define mmTCP_EDC_CNT …
#define mmTC_CFG_L1_LOAD_POLICY0 …
#define mmTC_CFG_L1_LOAD_POLICY1 …
#define mmTC_CFG_L1_STORE_POLICY …
#define mmTC_CFG_L2_LOAD_POLICY0 …
#define mmTC_CFG_L2_LOAD_POLICY1 …
#define mmTC_CFG_L2_STORE_POLICY0 …
#define mmTC_CFG_L2_STORE_POLICY1 …
#define mmTC_CFG_L2_ATOMIC_POLICY …
#define mmTC_CFG_L1_VOLATILE …
#define mmTC_CFG_L2_VOLATILE …
#define mmTCP_WATCH0_ADDR_H …
#define mmTCP_WATCH1_ADDR_H …
#define mmTCP_WATCH2_ADDR_H …
#define mmTCP_WATCH3_ADDR_H …
#define mmTCP_WATCH0_ADDR_L …
#define mmTCP_WATCH1_ADDR_L …
#define mmTCP_WATCH2_ADDR_L …
#define mmTCP_WATCH3_ADDR_L …
#define mmTCP_WATCH0_CNTL …
#define mmTCP_WATCH1_CNTL …
#define mmTCP_WATCH2_CNTL …
#define mmTCP_WATCH3_CNTL …
#define mmTCP_GATCL1_CNTL …
#define mmTCP_ATC_EDC_GATCL1_CNT …
#define mmTCP_GATCL1_DSM_CNTL …
#define mmTCP_DSM_CNTL …
#define mmTCP_CNTL2 …
#define mmTD_CGTT_CTRL …
#define mmTA_CGTT_CTRL …
#define mmCGTT_TCP_CLK_CTRL …
#define mmCGTT_TCI_CLK_CTRL …
#define mmTCI_STATUS …
#define mmTCI_CNTL_1 …
#define mmTCI_CNTL_2 …
#define mmGDS_CONFIG …
#define mmGDS_CNTL_STATUS …
#define mmGDS_ENHANCE2 …
#define mmGDS_PROTECTION_FAULT …
#define mmGDS_VM_PROTECTION_FAULT …
#define mmGDS_EDC_CNT …
#define mmGDS_EDC_GRBM_CNT …
#define mmGDS_EDC_OA_DED …
#define mmGDS_DEBUG_CNTL …
#define mmGDS_DEBUG_DATA …
#define mmGDS_DSM_CNTL …
#define mmCGTT_GDS_CLK_CTRL …
#define mmGDS_RD_ADDR …
#define mmGDS_RD_DATA …
#define mmGDS_RD_BURST_ADDR …
#define mmGDS_RD_BURST_COUNT …
#define mmGDS_RD_BURST_DATA …
#define mmGDS_WR_ADDR …
#define mmGDS_WR_DATA …
#define mmGDS_WR_BURST_ADDR …
#define mmGDS_WR_BURST_DATA …
#define mmGDS_WRITE_COMPLETE …
#define mmGDS_ATOM_CNTL …
#define mmGDS_ATOM_COMPLETE …
#define mmGDS_ATOM_BASE …
#define mmGDS_ATOM_SIZE …
#define mmGDS_ATOM_OFFSET0 …
#define mmGDS_ATOM_OFFSET1 …
#define mmGDS_ATOM_DST …
#define mmGDS_ATOM_OP …
#define mmGDS_ATOM_SRC0 …
#define mmGDS_ATOM_SRC0_U …
#define mmGDS_ATOM_SRC1 …
#define mmGDS_ATOM_SRC1_U …
#define mmGDS_ATOM_READ0 …
#define mmGDS_ATOM_READ0_U …
#define mmGDS_ATOM_READ1 …
#define mmGDS_ATOM_READ1_U …
#define mmGDS_GWS_RESOURCE_CNTL …
#define mmGDS_GWS_RESOURCE …
#define mmGDS_GWS_RESOURCE_CNT …
#define mmGDS_OA_CNTL …
#define mmGDS_OA_COUNTER …
#define mmGDS_OA_ADDRESS …
#define mmGDS_OA_INCDEC …
#define mmGDS_OA_RING_SIZE …
#define ixGDS_DEBUG_REG0 …
#define ixGDS_DEBUG_REG1 …
#define ixGDS_DEBUG_REG2 …
#define ixGDS_DEBUG_REG3 …
#define ixGDS_DEBUG_REG4 …
#define ixGDS_DEBUG_REG5 …
#define ixGDS_DEBUG_REG6 …
#define mmGDS_PERFCOUNTER0_SELECT …
#define mmGDS_PERFCOUNTER1_SELECT …
#define mmGDS_PERFCOUNTER2_SELECT …
#define mmGDS_PERFCOUNTER3_SELECT …
#define mmGDS_PERFCOUNTER0_LO …
#define mmGDS_PERFCOUNTER1_LO …
#define mmGDS_PERFCOUNTER2_LO …
#define mmGDS_PERFCOUNTER3_LO …
#define mmGDS_PERFCOUNTER0_HI …
#define mmGDS_PERFCOUNTER1_HI …
#define mmGDS_PERFCOUNTER2_HI …
#define mmGDS_PERFCOUNTER3_HI …
#define mmGDS_PERFCOUNTER0_SELECT1 …
#define mmGDS_VMID0_BASE …
#define mmGDS_VMID1_BASE …
#define mmGDS_VMID2_BASE …
#define mmGDS_VMID3_BASE …
#define mmGDS_VMID4_BASE …
#define mmGDS_VMID5_BASE …
#define mmGDS_VMID6_BASE …
#define mmGDS_VMID7_BASE …
#define mmGDS_VMID8_BASE …
#define mmGDS_VMID9_BASE …
#define mmGDS_VMID10_BASE …
#define mmGDS_VMID11_BASE …
#define mmGDS_VMID12_BASE …
#define mmGDS_VMID13_BASE …
#define mmGDS_VMID14_BASE …
#define mmGDS_VMID15_BASE …
#define mmGDS_VMID0_SIZE …
#define mmGDS_VMID1_SIZE …
#define mmGDS_VMID2_SIZE …
#define mmGDS_VMID3_SIZE …
#define mmGDS_VMID4_SIZE …
#define mmGDS_VMID5_SIZE …
#define mmGDS_VMID6_SIZE …
#define mmGDS_VMID7_SIZE …
#define mmGDS_VMID8_SIZE …
#define mmGDS_VMID9_SIZE …
#define mmGDS_VMID10_SIZE …
#define mmGDS_VMID11_SIZE …
#define mmGDS_VMID12_SIZE …
#define mmGDS_VMID13_SIZE …
#define mmGDS_VMID14_SIZE …
#define mmGDS_VMID15_SIZE …
#define mmGDS_GWS_VMID0 …
#define mmGDS_GWS_VMID1 …
#define mmGDS_GWS_VMID2 …
#define mmGDS_GWS_VMID3 …
#define mmGDS_GWS_VMID4 …
#define mmGDS_GWS_VMID5 …
#define mmGDS_GWS_VMID6 …
#define mmGDS_GWS_VMID7 …
#define mmGDS_GWS_VMID8 …
#define mmGDS_GWS_VMID9 …
#define mmGDS_GWS_VMID10 …
#define mmGDS_GWS_VMID11 …
#define mmGDS_GWS_VMID12 …
#define mmGDS_GWS_VMID13 …
#define mmGDS_GWS_VMID14 …
#define mmGDS_GWS_VMID15 …
#define mmGDS_OA_VMID0 …
#define mmGDS_OA_VMID1 …
#define mmGDS_OA_VMID2 …
#define mmGDS_OA_VMID3 …
#define mmGDS_OA_VMID4 …
#define mmGDS_OA_VMID5 …
#define mmGDS_OA_VMID6 …
#define mmGDS_OA_VMID7 …
#define mmGDS_OA_VMID8 …
#define mmGDS_OA_VMID9 …
#define mmGDS_OA_VMID10 …
#define mmGDS_OA_VMID11 …
#define mmGDS_OA_VMID12 …
#define mmGDS_OA_VMID13 …
#define mmGDS_OA_VMID14 …
#define mmGDS_OA_VMID15 …
#define mmGDS_GWS_RESET0 …
#define mmGDS_GWS_RESET1 …
#define mmGDS_GWS_RESOURCE_RESET …
#define mmGDS_COMPUTE_MAX_WAVE_ID …
#define mmGDS_OA_RESET_MASK …
#define mmGDS_OA_RESET …
#define mmGDS_ENHANCE …
#define mmGDS_OA_CGPG_RESTORE …
#define mmGDS_CS_CTXSW_STATUS …
#define mmGDS_CS_CTXSW_CNT0 …
#define mmGDS_CS_CTXSW_CNT1 …
#define mmGDS_CS_CTXSW_CNT2 …
#define mmGDS_CS_CTXSW_CNT3 …
#define mmGDS_GFX_CTXSW_STATUS …
#define mmGDS_VS_CTXSW_CNT0 …
#define mmGDS_VS_CTXSW_CNT1 …
#define mmGDS_VS_CTXSW_CNT2 …
#define mmGDS_VS_CTXSW_CNT3 …
#define mmGDS_PS0_CTXSW_CNT0 …
#define mmGDS_PS1_CTXSW_CNT0 …
#define mmGDS_PS2_CTXSW_CNT0 …
#define mmGDS_PS3_CTXSW_CNT0 …
#define mmGDS_PS4_CTXSW_CNT0 …
#define mmGDS_PS5_CTXSW_CNT0 …
#define mmGDS_PS6_CTXSW_CNT0 …
#define mmGDS_PS7_CTXSW_CNT0 …
#define mmGDS_PS0_CTXSW_CNT1 …
#define mmGDS_PS1_CTXSW_CNT1 …
#define mmGDS_PS2_CTXSW_CNT1 …
#define mmGDS_PS3_CTXSW_CNT1 …
#define mmGDS_PS4_CTXSW_CNT1 …
#define mmGDS_PS5_CTXSW_CNT1 …
#define mmGDS_PS6_CTXSW_CNT1 …
#define mmGDS_PS7_CTXSW_CNT1 …
#define mmGDS_PS0_CTXSW_CNT2 …
#define mmGDS_PS1_CTXSW_CNT2 …
#define mmGDS_PS2_CTXSW_CNT2 …
#define mmGDS_PS3_CTXSW_CNT2 …
#define mmGDS_PS4_CTXSW_CNT2 …
#define mmGDS_PS5_CTXSW_CNT2 …
#define mmGDS_PS6_CTXSW_CNT2 …
#define mmGDS_PS7_CTXSW_CNT2 …
#define mmGDS_PS0_CTXSW_CNT3 …
#define mmGDS_PS1_CTXSW_CNT3 …
#define mmGDS_PS2_CTXSW_CNT3 …
#define mmGDS_PS3_CTXSW_CNT3 …
#define mmGDS_PS4_CTXSW_CNT3 …
#define mmGDS_PS5_CTXSW_CNT3 …
#define mmGDS_PS6_CTXSW_CNT3 …
#define mmGDS_PS7_CTXSW_CNT3 …
#define mmCS_COPY_STATE …
#define mmGFX_COPY_STATE …
#define mmVGT_DRAW_INITIATOR …
#define mmVGT_EVENT_INITIATOR …
#define mmVGT_EVENT_ADDRESS_REG …
#define mmVGT_DMA_BASE_HI …
#define mmVGT_DMA_BASE …
#define mmVGT_DMA_INDEX_TYPE …
#define mmVGT_DMA_NUM_INSTANCES …
#define mmIA_ENHANCE …
#define mmVGT_DMA_SIZE …
#define mmVGT_DMA_MAX_SIZE …
#define mmVGT_DMA_PRIMITIVE_TYPE …
#define mmVGT_DMA_CONTROL …
#define mmVGT_IMMED_DATA …
#define mmVGT_INDEX_TYPE …
#define mmVGT_NUM_INDICES …
#define mmVGT_NUM_INSTANCES …
#define mmVGT_PRIMITIVE_TYPE …
#define mmVGT_PRIMITIVEID_EN …
#define mmVGT_PRIMITIVEID_RESET …
#define mmVGT_VTX_CNT_EN …
#define mmVGT_REUSE_OFF …
#define mmVGT_INSTANCE_STEP_RATE_0 …
#define mmVGT_INSTANCE_STEP_RATE_1 …
#define mmVGT_MAX_VTX_INDX …
#define mmVGT_MIN_VTX_INDX …
#define mmVGT_INDX_OFFSET …
#define mmVGT_VERTEX_REUSE_BLOCK_CNTL …
#define mmVGT_OUT_DEALLOC_CNTL …
#define mmVGT_MULTI_PRIM_IB_RESET_INDX …
#define mmVGT_MULTI_PRIM_IB_RESET_EN …
#define mmVGT_ENHANCE …
#define mmVGT_OUTPUT_PATH_CNTL …
#define mmVGT_HOS_CNTL …
#define mmVGT_HOS_MAX_TESS_LEVEL …
#define mmVGT_HOS_MIN_TESS_LEVEL …
#define mmVGT_HOS_REUSE_DEPTH …
#define mmVGT_GROUP_PRIM_TYPE …
#define mmVGT_GROUP_FIRST_DECR …
#define mmVGT_GROUP_DECR …
#define mmVGT_GROUP_VECT_0_CNTL …
#define mmVGT_GROUP_VECT_1_CNTL …
#define mmVGT_GROUP_VECT_0_FMT_CNTL …
#define mmVGT_GROUP_VECT_1_FMT_CNTL …
#define mmVGT_VTX_VECT_EJECT_REG …
#define mmVGT_DMA_DATA_FIFO_DEPTH …
#define mmVGT_DMA_REQ_FIFO_DEPTH …
#define mmVGT_DRAW_INIT_FIFO_DEPTH …
#define mmVGT_LAST_COPY_STATE …
#define mmCC_GC_SHADER_ARRAY_CONFIG …
#define mmGC_USER_SHADER_ARRAY_CONFIG …
#define mmVGT_GS_MODE …
#define mmVGT_GS_ONCHIP_CNTL …
#define mmVGT_GS_OUT_PRIM_TYPE …
#define mmVGT_CACHE_INVALIDATION …
#define mmVGT_RESET_DEBUG …
#define mmVGT_STRMOUT_DELAY …
#define mmVGT_FIFO_DEPTHS …
#define mmVGT_GS_PER_ES …
#define mmVGT_ES_PER_GS …
#define mmVGT_GS_PER_VS …
#define mmVGT_GS_VERTEX_REUSE …
#define mmVGT_MC_LAT_CNTL …
#define mmIA_CNTL_STATUS …
#define mmVGT_STRMOUT_CONFIG …
#define mmVGT_STRMOUT_BUFFER_SIZE_0 …
#define mmVGT_STRMOUT_BUFFER_SIZE_1 …
#define mmVGT_STRMOUT_BUFFER_SIZE_2 …
#define mmVGT_STRMOUT_BUFFER_SIZE_3 …
#define mmVGT_STRMOUT_BUFFER_OFFSET_0 …
#define mmVGT_STRMOUT_BUFFER_OFFSET_1 …
#define mmVGT_STRMOUT_BUFFER_OFFSET_2 …
#define mmVGT_STRMOUT_BUFFER_OFFSET_3 …
#define mmVGT_STRMOUT_VTX_STRIDE_0 …
#define mmVGT_STRMOUT_VTX_STRIDE_1 …
#define mmVGT_STRMOUT_VTX_STRIDE_2 …
#define mmVGT_STRMOUT_VTX_STRIDE_3 …
#define mmVGT_STRMOUT_BUFFER_CONFIG …
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0 …
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1 …
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2 …
#define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3 …
#define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET …
#define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE …
#define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE …
#define mmVGT_GS_MAX_VERT_OUT …
#define mmVGT_SHADER_STAGES_EN …
#define mmVGT_DISPATCH_DRAW_INDEX …
#define mmVGT_LS_HS_CONFIG …
#define mmVGT_DMA_LS_HS_CONFIG …
#define mmVGT_TF_PARAM …
#define mmVGT_TESS_DISTRIBUTION …
#define mmVGT_TF_RING_SIZE …
#define mmVGT_SYS_CONFIG …
#define mmVGT_HS_OFFCHIP_PARAM …
#define mmVGT_TF_MEMORY_BASE …
#define mmVGT_GS_INSTANCE_CNT …
#define mmIA_MULTI_VGT_PARAM …
#define mmVGT_VS_MAX_WAVE_ID …
#define mmVGT_ESGS_RING_SIZE …
#define mmVGT_GSVS_RING_SIZE …
#define mmVGT_GSVS_RING_OFFSET_1 …
#define mmVGT_GSVS_RING_OFFSET_2 …
#define mmVGT_GSVS_RING_OFFSET_3 …
#define mmVGT_ESGS_RING_ITEMSIZE …
#define mmVGT_GSVS_RING_ITEMSIZE …
#define mmVGT_GS_VERT_ITEMSIZE …
#define mmVGT_GS_VERT_ITEMSIZE_1 …
#define mmVGT_GS_VERT_ITEMSIZE_2 …
#define mmVGT_GS_VERT_ITEMSIZE_3 …
#define mmWD_CNTL_STATUS …
#define mmWD_ENHANCE …
#define mmGFX_PIPE_CONTROL …
#define mmGFX_PIPE_PRIORITY …
#define mmCGTT_VGT_CLK_CTRL …
#define mmCGTT_IA_CLK_CTRL …
#define mmCGTT_WD_CLK_CTRL …
#define mmVGT_DEBUG_CNTL …
#define mmVGT_DEBUG_DATA …
#define mmIA_DEBUG_CNTL …
#define mmIA_DEBUG_DATA …
#define mmVGT_CNTL_STATUS …
#define mmWD_DEBUG_CNTL …
#define mmWD_DEBUG_DATA …
#define mmWD_QOS …
#define mmCC_GC_PRIM_CONFIG …
#define mmGC_USER_PRIM_CONFIG …
#define ixWD_DEBUG_REG0 …
#define ixWD_DEBUG_REG1 …
#define ixWD_DEBUG_REG2 …
#define ixWD_DEBUG_REG3 …
#define ixWD_DEBUG_REG4 …
#define ixWD_DEBUG_REG5 …
#define ixWD_DEBUG_REG6 …
#define ixWD_DEBUG_REG7 …
#define ixWD_DEBUG_REG8 …
#define ixWD_DEBUG_REG9 …
#define ixWD_DEBUG_REG10 …
#define ixIA_DEBUG_REG0 …
#define ixIA_DEBUG_REG1 …
#define ixIA_DEBUG_REG2 …
#define ixIA_DEBUG_REG3 …
#define ixIA_DEBUG_REG4 …
#define ixIA_DEBUG_REG5 …
#define ixIA_DEBUG_REG6 …
#define ixIA_DEBUG_REG7 …
#define ixIA_DEBUG_REG8 …
#define ixIA_DEBUG_REG9 …
#define ixVGT_DEBUG_REG0 …
#define ixVGT_DEBUG_REG1 …
#define ixVGT_DEBUG_REG2 …
#define ixVGT_DEBUG_REG3 …
#define ixVGT_DEBUG_REG4 …
#define ixVGT_DEBUG_REG5 …
#define ixVGT_DEBUG_REG6 …
#define ixVGT_DEBUG_REG7 …
#define ixVGT_DEBUG_REG8 …
#define ixVGT_DEBUG_REG9 …
#define ixVGT_DEBUG_REG10 …
#define ixVGT_DEBUG_REG11 …
#define ixVGT_DEBUG_REG12 …
#define ixVGT_DEBUG_REG13 …
#define ixVGT_DEBUG_REG14 …
#define ixVGT_DEBUG_REG15 …
#define ixVGT_DEBUG_REG16 …
#define ixVGT_DEBUG_REG17 …
#define ixVGT_DEBUG_REG18 …
#define ixVGT_DEBUG_REG19 …
#define ixVGT_DEBUG_REG20 …
#define ixVGT_DEBUG_REG21 …
#define ixVGT_DEBUG_REG22 …
#define ixVGT_DEBUG_REG23 …
#define ixVGT_DEBUG_REG24 …
#define ixVGT_DEBUG_REG25 …
#define ixVGT_DEBUG_REG26 …
#define ixVGT_DEBUG_REG27 …
#define ixVGT_DEBUG_REG28 …
#define ixVGT_DEBUG_REG29 …
#define ixVGT_DEBUG_REG31 …
#define ixVGT_DEBUG_REG32 …
#define ixVGT_DEBUG_REG33 …
#define ixVGT_DEBUG_REG34 …
#define ixVGT_DEBUG_REG36 …
#define mmVGT_PERFCOUNTER_SEID_MASK …
#define mmVGT_PERFCOUNTER0_SELECT …
#define mmVGT_PERFCOUNTER1_SELECT …
#define mmVGT_PERFCOUNTER2_SELECT …
#define mmVGT_PERFCOUNTER3_SELECT …
#define mmVGT_PERFCOUNTER0_SELECT1 …
#define mmVGT_PERFCOUNTER1_SELECT1 …
#define mmVGT_PERFCOUNTER0_LO …
#define mmVGT_PERFCOUNTER1_LO …
#define mmVGT_PERFCOUNTER2_LO …
#define mmVGT_PERFCOUNTER3_LO …
#define mmVGT_PERFCOUNTER0_HI …
#define mmVGT_PERFCOUNTER1_HI …
#define mmVGT_PERFCOUNTER2_HI …
#define mmVGT_PERFCOUNTER3_HI …
#define mmIA_PERFCOUNTER0_SELECT …
#define mmIA_PERFCOUNTER1_SELECT …
#define mmIA_PERFCOUNTER2_SELECT …
#define mmIA_PERFCOUNTER3_SELECT …
#define mmIA_PERFCOUNTER0_SELECT1 …
#define mmIA_PERFCOUNTER0_LO …
#define mmIA_PERFCOUNTER1_LO …
#define mmIA_PERFCOUNTER2_LO …
#define mmIA_PERFCOUNTER3_LO …
#define mmIA_PERFCOUNTER0_HI …
#define mmIA_PERFCOUNTER1_HI …
#define mmIA_PERFCOUNTER2_HI …
#define mmIA_PERFCOUNTER3_HI …
#define mmWD_PERFCOUNTER0_SELECT …
#define mmWD_PERFCOUNTER1_SELECT …
#define mmWD_PERFCOUNTER2_SELECT …
#define mmWD_PERFCOUNTER3_SELECT …
#define mmWD_PERFCOUNTER0_LO …
#define mmWD_PERFCOUNTER1_LO …
#define mmWD_PERFCOUNTER2_LO …
#define mmWD_PERFCOUNTER3_LO …
#define mmWD_PERFCOUNTER0_HI …
#define mmWD_PERFCOUNTER1_HI …
#define mmWD_PERFCOUNTER2_HI …
#define mmWD_PERFCOUNTER3_HI …
#define mmDIDT_IND_INDEX …
#define mmDIDT_IND_DATA …
#define ixDIDT_SQ_CTRL0 …
#define ixDIDT_SQ_CTRL1 …
#define ixDIDT_SQ_CTRL2 …
#define ixDIDT_SQ_CTRL_OCP …
#define ixDIDT_SQ_WEIGHT0_3 …
#define ixDIDT_SQ_WEIGHT4_7 …
#define ixDIDT_SQ_WEIGHT8_11 …
#define ixDIDT_DB_CTRL0 …
#define ixDIDT_DB_CTRL1 …
#define ixDIDT_DB_CTRL2 …
#define ixDIDT_DB_CTRL_OCP …
#define ixDIDT_DB_WEIGHT0_3 …
#define ixDIDT_DB_WEIGHT4_7 …
#define ixDIDT_DB_WEIGHT8_11 …
#define ixDIDT_TD_CTRL0 …
#define ixDIDT_TD_CTRL1 …
#define ixDIDT_TD_CTRL2 …
#define ixDIDT_TD_CTRL_OCP …
#define ixDIDT_TD_WEIGHT0_3 …
#define ixDIDT_TD_WEIGHT4_7 …
#define ixDIDT_TD_WEIGHT8_11 …
#define ixDIDT_TCP_CTRL0 …
#define ixDIDT_TCP_CTRL1 …
#define ixDIDT_TCP_CTRL2 …
#define ixDIDT_TCP_CTRL_OCP …
#define ixDIDT_TCP_WEIGHT0_3 …
#define ixDIDT_TCP_WEIGHT4_7 …
#define ixDIDT_TCP_WEIGHT8_11 …
#define ixDIDT_DBR_CTRL0 …
#define ixDIDT_DBR_CTRL1 …
#define ixDIDT_DBR_CTRL2 …
#define ixDIDT_DBR_CTRL_OCP …
#define ixDIDT_DBR_WEIGHT0_3 …
#define ixDIDT_DBR_WEIGHT4_7 …
#define ixDIDT_DBR_WEIGHT8_11 …
#define mmTD_EDC_CNT …
#define mmCPF_EDC_TAG_CNT …
#define mmCPF_EDC_ROQ_CNT …
#define mmCPF_EDC_ATC_CNT …
#define mmCPG_EDC_TAG_CNT …
#define mmCPG_EDC_ATC_CNT …
#define mmCPG_EDC_DMA_CNT …
#define mmCPC_EDC_SCRATCH_CNT …
#define mmCPC_EDC_UCODE_CNT …
#define mmCPC_EDC_ATC_CNT …
#define mmDC_EDC_STATE_CNT …
#define mmDC_EDC_CSINVOC_CNT …
#define mmDC_EDC_RESTORE_CNT …

#define mmGC_CAC_IND_INDEX …
#define mmGC_CAC_IND_DATA …

#endif /* GFX_8_0_D_H */