linux/drivers/gpu/drm/amd/include/asic_reg/athub/athub_4_1_0_offset.h

/*
 * Copyright 2023 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#ifndef _athub_4_1_0_OFFSET_HEADER
#define _athub_4_1_0_OFFSET_HEADER



// addressBlock: athub_xpbdec
// base address: 0x3000
#define regXPB_RTR_SRC_APRTR0
#define regXPB_RTR_SRC_APRTR0_BASE_IDX
#define regXPB_RTR_SRC_APRTR1
#define regXPB_RTR_SRC_APRTR1_BASE_IDX
#define regXPB_RTR_SRC_APRTR2
#define regXPB_RTR_SRC_APRTR2_BASE_IDX
#define regXPB_RTR_SRC_APRTR3
#define regXPB_RTR_SRC_APRTR3_BASE_IDX
#define regXPB_RTR_SRC_APRTR4
#define regXPB_RTR_SRC_APRTR4_BASE_IDX
#define regXPB_RTR_SRC_APRTR5
#define regXPB_RTR_SRC_APRTR5_BASE_IDX
#define regXPB_RTR_SRC_APRTR6
#define regXPB_RTR_SRC_APRTR6_BASE_IDX
#define regXPB_RTR_SRC_APRTR7
#define regXPB_RTR_SRC_APRTR7_BASE_IDX
#define regXPB_RTR_SRC_APRTR8
#define regXPB_RTR_SRC_APRTR8_BASE_IDX
#define regXPB_RTR_SRC_APRTR9
#define regXPB_RTR_SRC_APRTR9_BASE_IDX
#define regXPB_RTR_SRC_APRTR10
#define regXPB_RTR_SRC_APRTR10_BASE_IDX
#define regXPB_RTR_SRC_APRTR11
#define regXPB_RTR_SRC_APRTR11_BASE_IDX
#define regXPB_RTR_SRC_APRTR12
#define regXPB_RTR_SRC_APRTR12_BASE_IDX
#define regXPB_RTR_SRC_APRTR13
#define regXPB_RTR_SRC_APRTR13_BASE_IDX
#define regXPB_RTR_DEST_MAP0
#define regXPB_RTR_DEST_MAP0_BASE_IDX
#define regXPB_RTR_DEST_MAP1
#define regXPB_RTR_DEST_MAP1_BASE_IDX
#define regXPB_RTR_DEST_MAP2
#define regXPB_RTR_DEST_MAP2_BASE_IDX
#define regXPB_RTR_DEST_MAP3
#define regXPB_RTR_DEST_MAP3_BASE_IDX
#define regXPB_RTR_DEST_MAP4
#define regXPB_RTR_DEST_MAP4_BASE_IDX
#define regXPB_RTR_DEST_MAP5
#define regXPB_RTR_DEST_MAP5_BASE_IDX
#define regXPB_RTR_DEST_MAP6
#define regXPB_RTR_DEST_MAP6_BASE_IDX
#define regXPB_RTR_DEST_MAP7
#define regXPB_RTR_DEST_MAP7_BASE_IDX
#define regXPB_RTR_DEST_MAP8
#define regXPB_RTR_DEST_MAP8_BASE_IDX
#define regXPB_RTR_DEST_MAP9
#define regXPB_RTR_DEST_MAP9_BASE_IDX
#define regXPB_RTR_DEST_MAP10
#define regXPB_RTR_DEST_MAP10_BASE_IDX
#define regXPB_RTR_DEST_MAP11
#define regXPB_RTR_DEST_MAP11_BASE_IDX
#define regXPB_RTR_DEST_MAP12
#define regXPB_RTR_DEST_MAP12_BASE_IDX
#define regXPB_RTR_DEST_MAP13
#define regXPB_RTR_DEST_MAP13_BASE_IDX
#define regXPB_CLG_CFG0
#define regXPB_CLG_CFG0_BASE_IDX
#define regXPB_CLG_CFG1
#define regXPB_CLG_CFG1_BASE_IDX
#define regXPB_CLG_CFG2
#define regXPB_CLG_CFG2_BASE_IDX
#define regXPB_CLG_CFG3
#define regXPB_CLG_CFG3_BASE_IDX
#define regXPB_CLG_CFG4
#define regXPB_CLG_CFG4_BASE_IDX
#define regXPB_CLG_CFG5
#define regXPB_CLG_CFG5_BASE_IDX
#define regXPB_CLG_CFG6
#define regXPB_CLG_CFG6_BASE_IDX
#define regXPB_CLG_CFG7
#define regXPB_CLG_CFG7_BASE_IDX
#define regXPB_CLG_EXTRA0
#define regXPB_CLG_EXTRA0_BASE_IDX
#define regXPB_CLG_EXTRA1
#define regXPB_CLG_EXTRA1_BASE_IDX
#define regXPB_CLG_EXTRA_MSK
#define regXPB_CLG_EXTRA_MSK_BASE_IDX
#define regXPB_LB_ADDR
#define regXPB_LB_ADDR_BASE_IDX
#define regXPB_HST_CFG
#define regXPB_HST_CFG_BASE_IDX
#define regXPB_P2P_BAR_CFG
#define regXPB_P2P_BAR_CFG_BASE_IDX
#define regXPB_P2P_BAR0
#define regXPB_P2P_BAR0_BASE_IDX
#define regXPB_P2P_BAR1
#define regXPB_P2P_BAR1_BASE_IDX
#define regXPB_P2P_BAR2
#define regXPB_P2P_BAR2_BASE_IDX
#define regXPB_P2P_BAR3
#define regXPB_P2P_BAR3_BASE_IDX
#define regXPB_P2P_BAR4
#define regXPB_P2P_BAR4_BASE_IDX
#define regXPB_P2P_BAR5
#define regXPB_P2P_BAR5_BASE_IDX
#define regXPB_P2P_BAR6
#define regXPB_P2P_BAR6_BASE_IDX
#define regXPB_P2P_BAR7
#define regXPB_P2P_BAR7_BASE_IDX
#define regXPB_P2P_BAR_SETUP
#define regXPB_P2P_BAR_SETUP_BASE_IDX
#define regXPB_P2P_BAR_DELTA_ABOVE
#define regXPB_P2P_BAR_DELTA_ABOVE_BASE_IDX
#define regXPB_P2P_BAR_DELTA_BELOW
#define regXPB_P2P_BAR_DELTA_BELOW_BASE_IDX
#define regXPB_PEER_SYS_BAR0
#define regXPB_PEER_SYS_BAR0_BASE_IDX
#define regXPB_PEER_SYS_BAR1
#define regXPB_PEER_SYS_BAR1_BASE_IDX
#define regXPB_PEER_SYS_BAR2
#define regXPB_PEER_SYS_BAR2_BASE_IDX
#define regXPB_PEER_SYS_BAR3
#define regXPB_PEER_SYS_BAR3_BASE_IDX
#define regXPB_PEER_SYS_BAR4
#define regXPB_PEER_SYS_BAR4_BASE_IDX
#define regXPB_PEER_SYS_BAR5
#define regXPB_PEER_SYS_BAR5_BASE_IDX
#define regXPB_PEER_SYS_BAR6
#define regXPB_PEER_SYS_BAR6_BASE_IDX
#define regXPB_PEER_SYS_BAR7
#define regXPB_PEER_SYS_BAR7_BASE_IDX
#define regXPB_PEER_SYS_BAR8
#define regXPB_PEER_SYS_BAR8_BASE_IDX
#define regXPB_PEER_SYS_BAR9
#define regXPB_PEER_SYS_BAR9_BASE_IDX
#define regXPB_PEER_SYS_BAR10
#define regXPB_PEER_SYS_BAR10_BASE_IDX
#define regXPB_PEER_SYS_BAR11
#define regXPB_PEER_SYS_BAR11_BASE_IDX
#define regXPB_PEER_SYS_BAR12
#define regXPB_PEER_SYS_BAR12_BASE_IDX
#define regXPB_PEER_SYS_BAR13
#define regXPB_PEER_SYS_BAR13_BASE_IDX
#define regXPB_CLK_GAT
#define regXPB_CLK_GAT_BASE_IDX
#define regXPB_INTF_CFG
#define regXPB_INTF_CFG_BASE_IDX
#define regXPB_INTF_STS
#define regXPB_INTF_STS_BASE_IDX
#define regXPB_PIPE_STS
#define regXPB_PIPE_STS_BASE_IDX
#define regXPB_WCB_STS
#define regXPB_WCB_STS_BASE_IDX
#define regXPB_MAP_INVERT_FLUSH_NUM_LSB
#define regXPB_MAP_INVERT_FLUSH_NUM_LSB_BASE_IDX
#define regXPB_STICKY
#define regXPB_STICKY_BASE_IDX
#define regXPB_STICKY_W1C
#define regXPB_STICKY_W1C_BASE_IDX
#define regXPB_SUB_CTRL
#define regXPB_SUB_CTRL_BASE_IDX
#define regXPB_PERF_KNOBS
#define regXPB_PERF_KNOBS_BASE_IDX
#define regXPB_MISC_CFG
#define regXPB_MISC_CFG_BASE_IDX
#define regXPB_INTF_CFG2
#define regXPB_INTF_CFG2_BASE_IDX
#define regXPB_CLG_EXTRA_RD
#define regXPB_CLG_EXTRA_RD_BASE_IDX
#define regXPB_CLG_EXTRA_MSK_RD
#define regXPB_CLG_EXTRA_MSK_RD_BASE_IDX
#define regXPB_CLG_GFX_MATCH
#define regXPB_CLG_GFX_MATCH_BASE_IDX
#define regXPB_CLG_GFX_MATCH_VLD
#define regXPB_CLG_GFX_MATCH_VLD_BASE_IDX
#define regXPB_CLG_GFX_MATCH_MSK
#define regXPB_CLG_GFX_MATCH_MSK_BASE_IDX
#define regXPB_CLG_MM_MATCH
#define regXPB_CLG_MM_MATCH_BASE_IDX
#define regXPB_CLG_MM_MATCH_VLD
#define regXPB_CLG_MM_MATCH_VLD_BASE_IDX
#define regXPB_CLG_MM_MATCH_MSK
#define regXPB_CLG_MM_MATCH_MSK_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING0
#define regXPB_CLG_GFX_UNITID_MAPPING0_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING1
#define regXPB_CLG_GFX_UNITID_MAPPING1_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING2
#define regXPB_CLG_GFX_UNITID_MAPPING2_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING3
#define regXPB_CLG_GFX_UNITID_MAPPING3_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING4
#define regXPB_CLG_GFX_UNITID_MAPPING4_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING5
#define regXPB_CLG_GFX_UNITID_MAPPING5_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING6
#define regXPB_CLG_GFX_UNITID_MAPPING6_BASE_IDX
#define regXPB_CLG_GFX_UNITID_MAPPING7
#define regXPB_CLG_GFX_UNITID_MAPPING7_BASE_IDX
#define regXPB_CLG_MM_UNITID_MAPPING0
#define regXPB_CLG_MM_UNITID_MAPPING0_BASE_IDX
#define regXPB_CLG_MM_UNITID_MAPPING1
#define regXPB_CLG_MM_UNITID_MAPPING1_BASE_IDX
#define regXPB_CLG_MM_UNITID_MAPPING2
#define regXPB_CLG_MM_UNITID_MAPPING2_BASE_IDX
#define regXPB_CLG_MM_UNITID_MAPPING3
#define regXPB_CLG_MM_UNITID_MAPPING3_BASE_IDX


// addressBlock: athub_rpbdec
// base address: 0x31d0
#define regATHUB_SHARED_VIRT_RESET_REQ
#define regATHUB_SHARED_VIRT_RESET_REQ_BASE_IDX
#define regATHUB_MEM_POWER_LS
#define regATHUB_MEM_POWER_LS_BASE_IDX
#define regATHUB_MISC_CNTL
#define regATHUB_MISC_CNTL_BASE_IDX
#define regRPB_PASSPW_CONF
#define regRPB_PASSPW_CONF_BASE_IDX
#define regRPB_BLOCKLEVEL_CONF
#define regRPB_BLOCKLEVEL_CONF_BASE_IDX
#define regRPB_TAG_CONF
#define regRPB_TAG_CONF_BASE_IDX
#define regRPB_ARB_CNTL
#define regRPB_ARB_CNTL_BASE_IDX
#define regRPB_ARB_CNTL2
#define regRPB_ARB_CNTL2_BASE_IDX
#define regRPB_BIF_CNTL
#define regRPB_BIF_CNTL_BASE_IDX
#define regRPB_BIF_CNTL2
#define regRPB_BIF_CNTL2_BASE_IDX
#define regRPB_SDPPORT_CNTL
#define regRPB_SDPPORT_CNTL_BASE_IDX
#define regRPB_NBIF_SDPPORT_CNTL
#define regRPB_NBIF_SDPPORT_CNTL_BASE_IDX
#define regRPB_DEINTRLV_COMBINE_CNTL
#define regRPB_DEINTRLV_COMBINE_CNTL_BASE_IDX
#define regRPB_VC_SWITCH_RDWR
#define regRPB_VC_SWITCH_RDWR_BASE_IDX
#define regRPB_ATS_CNTL3
#define regRPB_ATS_CNTL3_BASE_IDX
#define regRPB_DF_SDPPORT_CNTL
#define regRPB_DF_SDPPORT_CNTL_BASE_IDX
#define regRPB_ATS_CNTL
#define regRPB_ATS_CNTL_BASE_IDX
#define regRPB_ATS_CNTL2
#define regRPB_ATS_CNTL2_BASE_IDX
#define regRPB_PERFCOUNTER0_CFG
#define regRPB_PERFCOUNTER0_CFG_BASE_IDX
#define regRPB_PERFCOUNTER1_CFG
#define regRPB_PERFCOUNTER1_CFG_BASE_IDX
#define regRPB_PERFCOUNTER2_CFG
#define regRPB_PERFCOUNTER2_CFG_BASE_IDX
#define regRPB_PERFCOUNTER3_CFG
#define regRPB_PERFCOUNTER3_CFG_BASE_IDX
#define regRPB_PERFCOUNTER_RSLT_CNTL
#define regRPB_PERFCOUNTER_RSLT_CNTL_BASE_IDX
#define regRPB_PERF_COUNTER_CNTL
#define regRPB_PERF_COUNTER_CNTL_BASE_IDX
#define regRPB_PERFCOUNTER_HI
#define regRPB_PERFCOUNTER_HI_BASE_IDX
#define regRPB_PERFCOUNTER_LO
#define regRPB_PERFCOUNTER_LO_BASE_IDX
#define regRPB_PERF_COUNTER_STATUS
#define regRPB_PERF_COUNTER_STATUS_BASE_IDX

#endif