/* * VCE_3_0 Register documentation * * Copyright (C) 2014 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included * in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #ifndef VCE_3_0_D_H #define VCE_3_0_D_H #define mmVCE_STATUS … #define mmVCE_VCPU_CNTL … #define mmVCE_VCPU_CACHE_OFFSET0 … #define mmVCE_VCPU_CACHE_SIZE0 … #define mmVCE_VCPU_CACHE_OFFSET1 … #define mmVCE_VCPU_CACHE_SIZE1 … #define mmVCE_VCPU_CACHE_OFFSET2 … #define mmVCE_VCPU_CACHE_SIZE2 … #define mmVCE_SOFT_RESET … #define mmVCE_RB_BASE_LO2 … #define mmVCE_RB_BASE_HI2 … #define mmVCE_RB_SIZE2 … #define mmVCE_RB_RPTR2 … #define mmVCE_RB_WPTR2 … #define mmVCE_RB_BASE_LO … #define mmVCE_RB_BASE_HI … #define mmVCE_RB_SIZE … #define mmVCE_RB_RPTR … #define mmVCE_RB_WPTR … #define mmVCE_RB_ARB_CTRL … #define mmVCE_CLOCK_GATING_A … #define mmVCE_CLOCK_GATING_B … #define mmVCE_RB_BASE_LO3 … #define mmVCE_RB_BASE_HI3 … #define mmVCE_RB_SIZE3 … #define mmVCE_RB_RPTR3 … #define mmVCE_RB_WPTR3 … #define mmVCE_UENC_DMA_DCLK_CTRL … #define mmVCE_UENC_CLOCK_GATING … #define mmVCE_UENC_REG_CLOCK_GATING … #define mmVCE_UENC_CLOCK_GATING_2 … #define mmVCE_SYS_INT_EN … #define mmVCE_SYS_INT_STATUS … #define mmVCE_SYS_INT_ACK … #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR … #define mmVCE_LMI_CTRL2 … #define mmVCE_LMI_SWAP_CNTL3 … #define mmVCE_LMI_CTRL … #define mmVCE_LMI_STATUS … #define mmVCE_LMI_VM_CTRL … #define mmVCE_LMI_SWAP_CNTL … #define mmVCE_LMI_SWAP_CNTL1 … #define mmVCE_LMI_SWAP_CNTL2 … #define mmVCE_LMI_MISC_CTRL … #define mmVCE_LMI_CACHE_CTRL … #endif /* VCE_3_0_D_H */
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