linux/tools/perf/pmu-events/arch/x86/amdzen4/core.json

[
  {
    "EventName": "ls_locks.bus_lock",
    "EventCode": "0x25",
    "BriefDescription": "Retired Lock instructions which caused a bus lock.",
    "UMask": "0x01"
  },
  {
    "EventName": "ls_ret_cl_flush",
    "EventCode": "0x26",
    "BriefDescription": "Retired CLFLUSH instructions."
  },
  {
    "EventName": "ls_ret_cpuid",
    "EventCode": "0x27",
    "BriefDescription": "Retired CPUID instructions."
  },
  {
    "EventName": "ls_smi_rx",
    "EventCode": "0x2b",
    "BriefDescription": "SMIs received."
  },
  {
    "EventName": "ls_int_taken",
    "EventCode": "0x2c",
    "BriefDescription": "Interrupts taken."
  },
  {
    "EventName": "ls_not_halted_cyc",
    "EventCode": "0x76",
    "BriefDescription": "Core cycles not in halt."
  },
  {
    "EventName": "ex_ret_instr",
    "EventCode": "0xc0",
    "BriefDescription": "Retired instructions."
  },
  {
    "EventName": "ex_ret_ops",
    "EventCode": "0xc1",
    "BriefDescription": "Retired macro-ops."
  },
  {
    "EventName": "ex_div_busy",
    "EventCode": "0xd3",
    "BriefDescription": "Number of cycles the divider is busy."
  },
  {
    "EventName": "ex_div_count",
    "EventCode": "0xd4",
    "BriefDescription": "Divide ops executed."
  },
  {
    "EventName": "ex_no_retire.empty",
    "EventCode": "0xd6",
    "BriefDescription": "Cycles with no retire due  to the lack of valid ops in the retire queue (may be caused by front-end bottlenecks or pipeline redirects).",
    "UMask": "0x01"
  },
  {
    "EventName": "ex_no_retire.not_complete",
    "EventCode": "0xd6",
    "BriefDescription": "Cycles with no retire while the oldest op is waiting to be executed.",
    "UMask": "0x02"
  },
  {
    "EventName": "ex_no_retire.other",
    "EventCode": "0xd6",
    "BriefDescription": "Cycles with no retire caused by other reasons (retire breaks, traps, faults, etc.).",
    "UMask": "0x08"
  },
  {
    "EventName": "ex_no_retire.thread_not_selected",
    "EventCode": "0xd6",
    "BriefDescription": "Cycles with no retire because thread arbitration did not select the thread.",
    "UMask": "0x10"
  },
  {
    "EventName": "ex_no_retire.load_not_complete",
    "EventCode": "0xd6",
    "BriefDescription": "Cycles with no retire while the oldest op is waiting for load data.",
    "UMask": "0xa2"
  },
  {
    "EventName": "ex_no_retire.all",
    "EventCode": "0xd6",
    "BriefDescription": "Cycles with no retire for any reason.",
    "UMask": "0x1b"
  },
  {
    "EventName": "ls_not_halted_p0_cyc.p0_freq_cyc",
    "EventCode": "0x120",
    "BriefDescription": "Reference cycles (P0 frequency) not in halt .",
    "UMask": "0x1"
  },
  {
    "EventName": "ex_ret_ucode_instr",
    "EventCode": "0x1c1",
    "BriefDescription": "Retired microcoded instructions."
  },
  {
    "EventName": "ex_ret_ucode_ops",
    "EventCode": "0x1c2",
    "BriefDescription": "Retired microcode ops."
  },
  {
    "EventName": "ex_tagged_ibs_ops.ibs_tagged_ops",
    "EventCode": "0x1cf",
    "BriefDescription": "Ops tagged by IBS.",
    "UMask": "0x01"
  },
  {
    "EventName": "ex_tagged_ibs_ops.ibs_tagged_ops_ret",
    "EventCode": "0x1cf",
    "BriefDescription": "Ops tagged by IBS that retired.",
    "UMask": "0x02"
  },
  {
    "EventName": "ex_ret_fused_instr",
    "EventCode": "0x1d0",
    "BriefDescription": "Retired fused instructions."
  }
]