linux/drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h

/*
 * Copyright (C) 2018  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef _thm_11_0_2_OFFSET_HEADER
#define _thm_11_0_2_OFFSET_HEADER


#define mmCG_MULT_THERMAL_STATUS                                                                       0x005f
#define mmCG_MULT_THERMAL_STATUS_BASE_IDX                                                              0

#define mmCG_FDO_CTRL0                                                                                 0x0067
#define mmCG_FDO_CTRL0_BASE_IDX                                                                        0

#define mmCG_FDO_CTRL1                                                                                 0x0068
#define mmCG_FDO_CTRL1_BASE_IDX                                                                        0

#define mmCG_FDO_CTRL2                                                                                 0x0069
#define mmCG_FDO_CTRL2_BASE_IDX                                                                        0

#define mmCG_TACH_CTRL                                                                                 0x006a
#define mmCG_TACH_CTRL_BASE_IDX                                                                        0

#define mmCG_TACH_STATUS                                                                               0x006b
#define mmCG_TACH_STATUS_BASE_IDX                                                                      0

#define mmTHM_THERMAL_INT_ENA                                                                          0x000a
#define mmTHM_THERMAL_INT_ENA_BASE_IDX                                                                 0
#define mmTHM_THERMAL_INT_CTRL                                                                         0x000b
#define mmTHM_THERMAL_INT_CTRL_BASE_IDX                                                                0

#define mmTHM_TCON_THERM_TRIP                                                                          0x0002
#define mmTHM_TCON_THERM_TRIP_BASE_IDX                                                                 0

#define mmTHM_BACO_CNTL                                                                                0x0081
#define mmTHM_BACO_CNTL_BASE_IDX                                                                       0

#define mmCG_THERMAL_STATUS                                                                            0x006C
#define mmCG_THERMAL_STATUS_BASE_IDX                                                                   0

#endif