chromium/third_party/xnnpack/src/src/xnnpack/simd/f32-sse2.h

// Copyright 2024 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.
//

#ifndef __XNNPACK_SRC_XNNPACK_SIMD_F32_SSE2_H_
#define __XNNPACK_SRC_XNNPACK_SIMD_F32_SSE2_H_

#include <assert.h>
#include <emmintrin.h>
#include <stddef.h>
#include <stdint.h>

#include "xnnpack/common.h"

// SIMD vector type for f32 using SSE2.
xnn_simd_f32_t;
#define xnn_simd_size_f32 …
#define xnn_simd_log2_size_f32 …
#define xnn_simd_bytes_f32 …

#define XNN_SIMD_CONST_F32(var, val) …

#define XNN_SIMD_CONST_U32(var, val) …

// Whether or not this architecture has native fused multiply-add support.
#define XNN_SIMD_HAS_NATIVE_FMA …

// Include the header for generic functions _after_ declaring the arch-specific
// types and sizes.
#include "xnnpack/simd/f32-generic-functions.h"

// Arithmetic operations.

static XNN_INLINE xnn_simd_f32_t xnn_zero_f32() { … }

static XNN_INLINE xnn_simd_f32_t xnn_add_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_mul_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_fmadd_f32(xnn_simd_f32_t a,
                                               xnn_simd_f32_t b,
                                               xnn_simd_f32_t c) { … }

static XNN_INLINE xnn_simd_f32_t xnn_fnmadd_f32(xnn_simd_f32_t a,
                                                xnn_simd_f32_t b,
                                                xnn_simd_f32_t c) { … }

static XNN_INLINE xnn_simd_f32_t xnn_fmsub_f32(xnn_simd_f32_t a,
                                               xnn_simd_f32_t b,
                                               xnn_simd_f32_t c) { … }

static XNN_INLINE xnn_simd_f32_t xnn_sub_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_div_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_max_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_min_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_abs_f32(xnn_simd_f32_t a) { … }

static XNN_INLINE xnn_simd_f32_t xnn_neg_f32(xnn_simd_f32_t a) { … }

// Logical operations.

static XNN_INLINE xnn_simd_f32_t xnn_and_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_or_f32(xnn_simd_f32_t a,
                                            xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_xor_f32(xnn_simd_f32_t a,
                                             xnn_simd_f32_t b) { … }

static XNN_INLINE xnn_simd_f32_t xnn_sll_f32(xnn_simd_f32_t a, uint8_t bits) { … }

static XNN_INLINE xnn_simd_f32_t xnn_srl_f32(xnn_simd_f32_t a, uint8_t bits) { … }

static XNN_INLINE xnn_simd_f32_t xnn_sra_f32(xnn_simd_f32_t a, uint8_t bits) { … }

static XNN_INLINE xnn_simd_f32_t xnn_cmpeq_f32(xnn_simd_f32_t a,
                                               xnn_simd_f32_t b) { … }

// Special functions.

#define XNN_SIMD_HAVE_RCP_F32 …
#define XNN_SIMD_NUM_RCP_ITER_F32 …
static XNN_INLINE xnn_simd_f32_t xnn_rcp_f32(xnn_simd_f32_t a) { … }

#define XNN_SIMD_HAVE_RSQRT_F32 …
#define XNN_SIMD_NUM_RSQRT_ITER_F32 …
static XNN_INLINE xnn_simd_f32_t xnn_rsqrt_f32(xnn_simd_f32_t a) { … }

static XNN_INLINE xnn_simd_f32_t xnn_getexp_f32(xnn_simd_f32_t a) { … }

// Load/store operations.

static XNN_INLINE xnn_simd_f32_t xnn_loadu_f32(const float* ptr) { … }

static XNN_INLINE xnn_simd_f32_t xnn_load_f32(const float* ptr) { … }

static XNN_INLINE void xnn_storeu_f32(float* ptr, xnn_simd_f32_t v) { … }

static XNN_INLINE void xnn_store_f32(float* ptr, xnn_simd_f32_t v) { … }

static XNN_INLINE xnn_simd_f32_t xnn_set1_f32(float v) { … }

static XNN_INLINE xnn_simd_f32_t xnn_set1_or_load_f32(const float* v) { … }

// Tail load/store operations.

static XNN_INLINE xnn_simd_f32_t
xnn_load_tail_f32(const float* input, size_t num_elements) XNN_OOB_READS { … }

static XNN_INLINE void xnn_store_tail_f32(float* output, xnn_simd_f32_t v,
                                          size_t num_elements) { … }

#endif  // __XNNPACK_SRC_XNNPACK_SIMD_F32_SSE2_H_