chromium/v8/src/codegen/x64/sse-instr.h

// Copyright 2012 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

#ifndef V8_CODEGEN_X64_SSE_INSTR_H_
#define V8_CODEGEN_X64_SSE_INSTR_H_

// SSE instructions whose AVX version has two operands.
#define SSE_UNOP_INSTRUCTION_LIST(V)

// SSE instructions whose AVX version has three operands.
#define SSE_BINOP_INSTRUCTION_LIST(V)

// Instructions dealing with scalar single-precision values.
#define SSE_INSTRUCTION_LIST_SS(V)

// Keep sorted by last code.
// SSE2 Instructions dealing with packed double-precision values.
#define SSE2_INSTRUCTION_LIST_PD(V)

// SSE2 Instructions dealing with packed integer values.
#define SSE2_INSTRUCTION_LIST_PI(V)

// SSE2 shift instructions with XMM register or m128 operand
#define SSE2_INSTRUCTION_LIST_SHIFT(V)

#define SSE2_INSTRUCTION_LIST(V)

// SSE2 instructions whose AVX version has two operands.
#define SSE2_UNOP_INSTRUCTION_LIST(V)

// SSE2 shift instructions with an immediate operand. The last element is the
// extension to the opcode.
#define SSE2_INSTRUCTION_LIST_SHIFT_IMM(V)

// Instructions dealing with scalar double-precision values.
#define SSE2_INSTRUCTION_LIST_SD(V)

#define SSSE3_INSTRUCTION_LIST(V)

// SSSE3 instructions whose AVX version has two operands.
#define SSSE3_UNOP_INSTRUCTION_LIST(V)

#define SSE4_INSTRUCTION_LIST(V)

// SSE instructions whose AVX version has two operands.
#define SSE4_UNOP_INSTRUCTION_LIST(V)

#define SSE4_UNOP_INSTRUCTION_LIST_PMOV(V)

#define SSE4_EXTRACT_INSTRUCTION_LIST(V)

#define SSE4_2_INSTRUCTION_LIST(V)

// These require AVX2.
#define AVX2_BROADCAST_LIST(V)

#endif  // V8_CODEGEN_X64_SSE_INSTR_H_