chromium/v8/src/codegen/x64/assembler-x64-inl.h

// Copyright 2012 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

#ifndef V8_CODEGEN_X64_ASSEMBLER_X64_INL_H_
#define V8_CODEGEN_X64_ASSEMBLER_X64_INL_H_

#include "src/base/cpu.h"
#include "src/base/memory.h"
#include "src/codegen/flush-instruction-cache.h"
#include "src/codegen/x64/assembler-x64.h"
#include "src/debug/debug.h"
#include "src/objects/objects-inl.h"

namespace v8 {
namespace internal {

bool CpuFeatures::SupportsOptimizer() { … }

// -----------------------------------------------------------------------------
// Implementation of Assembler

void Assembler::emit_rex_64(Register reg, Register rm_reg) { … }

void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) { … }

void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) { … }

void Assembler::emit_rex_64(XMMRegister reg, XMMRegister rm_reg) { … }

void Assembler::emit_rex_64(Register reg, Operand op) { … }

void Assembler::emit_rex_64(XMMRegister reg, Operand op) { … }

void Assembler::emit_rex_64(Register rm_reg) { … }

void Assembler::emit_rex_64(Operand op) { … }

void Assembler::emit_rex_32(Register reg, Register rm_reg) { … }

void Assembler::emit_rex_32(Register reg, Operand op) { … }

void Assembler::emit_rex_32(Register rm_reg) { … }

void Assembler::emit_rex_32(Operand op) { … }

void Assembler::emit_optional_rex_32(Register reg, Register rm_reg) { … }

void Assembler::emit_optional_rex_32(Register reg, Operand op) { … }

void Assembler::emit_optional_rex_32(XMMRegister reg, Operand op) { … }

void Assembler::emit_optional_rex_32(XMMRegister reg, XMMRegister base) { … }

void Assembler::emit_optional_rex_32(XMMRegister reg, Register base) { … }

void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) { … }

void Assembler::emit_optional_rex_32(Register rm_reg) { … }

void Assembler::emit_optional_rex_32(XMMRegister rm_reg) { … }

void Assembler::emit_optional_rex_32(Operand op) { … }

void Assembler::emit_optional_rex_8(Register reg) { … }

void Assembler::emit_optional_rex_8(Register reg, Operand op) { … }

// byte 1 of 3-byte VEX
void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm,
                                LeadingOpcode m) { … }

// byte 1 of 3-byte VEX
void Assembler::emit_vex3_byte1(XMMRegister reg, Operand rm, LeadingOpcode m) { … }

// byte 1 of 2-byte VEX
void Assembler::emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l,
                                SIMDPrefix pp) { … }

// byte 2 of 3-byte VEX
void Assembler::emit_vex3_byte2(VexW w, XMMRegister v, VectorLength l,
                                SIMDPrefix pp) { … }

void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
                                XMMRegister rm, VectorLength l, SIMDPrefix pp,
                                LeadingOpcode mm, VexW w) { … }

void Assembler::emit_vex_prefix(Register reg, Register vreg, Register rm,
                                VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
                                VexW w) { … }

void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg, Operand rm,
                                VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
                                VexW w) { … }

void Assembler::emit_vex_prefix(Register reg, Register vreg, Operand rm,
                                VectorLength l, SIMDPrefix pp, LeadingOpcode mm,
                                VexW w) { … }

Address Assembler::target_address_at(Address pc, Address constant_pool) { … }

void Assembler::set_target_address_at(Address pc, Address constant_pool,
                                      Address target,
                                      ICacheFlushMode icache_flush_mode) { … }

int32_t Assembler::relative_target_offset(Address target, Address pc) { … }

void Assembler::deserialization_set_target_internal_reference_at(
    Address pc, Address target, RelocInfo::Mode mode) { … }

void Assembler::deserialization_set_special_target_at(
    Address instruction_payload, Tagged<Code> code, Address target) { … }

int Assembler::deserialization_special_target_size(
    Address instruction_payload) { … }

Handle<Code> Assembler::code_target_object_handle_at(Address pc) { … }

Handle<HeapObject> Assembler::compressed_embedded_object_handle_at(Address pc) { … }

Builtin Assembler::target_builtin_at(Address pc) { … }

uint32_t Assembler::uint32_constant_at(Address pc, Address constant_pool) { … }

void Assembler::set_uint32_constant_at(Address pc, Address constant_pool,
                                       uint32_t new_constant,
                                       ICacheFlushMode icache_flush_mode) { … }

// -----------------------------------------------------------------------------
// Implementation of RelocInfo

// The modes possibly affected by apply must be in kApplyMask.
void WritableRelocInfo::apply(intptr_t delta) { … }

Address RelocInfo::target_address() { … }

Address RelocInfo::target_address_address() { … }

Address RelocInfo::constant_pool_entry_address() { … }

int RelocInfo::target_address_size() { … }

Tagged<HeapObject> RelocInfo::target_object(PtrComprCageBase cage_base) { … }

Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) { … }

Address RelocInfo::target_external_reference() { … }

void WritableRelocInfo::set_target_external_reference(
    Address target, ICacheFlushMode icache_flush_mode) { … }

Address RelocInfo::target_internal_reference() { … }

Address RelocInfo::target_internal_reference_address() { … }

void WritableRelocInfo::set_target_object(Tagged<HeapObject> target,
                                          ICacheFlushMode icache_flush_mode) { … }

Builtin RelocInfo::target_builtin_at(Assembler* origin) { … }

Address RelocInfo::target_off_heap_target() { … }

}  // namespace internal
}  // namespace v8

#endif  // V8_CODEGEN_X64_ASSEMBLER_X64_INL_H_