assembler-x64.cc | Explore in Territory

// Copyright 2012 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.

#include "src/codegen/x64/assembler-x64.h"

#include <cstring>

#include "src/utils/utils.h"

#if V8_TARGET_ARCH_X64

#if V8_LIBC_MSVCRT
#include <intrin.h>  // _xgetbv()
#endif
#if V8_OS_DARWIN
#include <sys/sysctl.h>
#endif

#include "src/base/bits.h"
#include "src/base/cpu.h"
#include "src/codegen/assembler-inl.h"
#include "src/codegen/macro-assembler.h"
#include "src/deoptimizer/deoptimizer.h"
#include "src/flags/flags.h"
#include "src/init/v8.h"

namespace v8 {
namespace internal {

// -----------------------------------------------------------------------------
// Implementation of CpuFeatures

namespace {

#if V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64

V8_INLINE uint64_t xgetbv(unsigned int xcr) { … }

bool OSHasAVXSupport() { … }

#endif  // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64

}  // namespace

bool CpuFeatures::SupportsWasmSimd128() { … }

void CpuFeatures::ProbeImpl(bool cross_compile) { … }

void CpuFeatures::PrintTarget() { … }
void CpuFeatures::PrintFeatures() { … }

// -----------------------------------------------------------------------------
// Implementation of RelocInfo

uint32_t RelocInfo::wasm_call_tag() const { … }

// -----------------------------------------------------------------------------
// Implementation of Operand

Operand::Operand(Operand operand, int32_t offset) { … }

bool Operand::AddressUsesRegister(Register reg) const { … }

void Assembler::AllocateAndInstallRequestedHeapNumbers(LocalIsolate* isolate) { … }

// Partial Constant Pool.
bool ConstPool::AddSharedEntry(uint64_t data, int offset) { … }

bool ConstPool::TryRecordEntry(intptr_t data, RelocInfo::Mode mode) { … }

bool ConstPool::IsMoveRipRelative(Address instr) { … }

void ConstPool::Clear() { … }

void ConstPool::PatchEntries() { … }

void Assembler::PatchConstPool() { … }

bool Assembler::UseConstPoolFor(RelocInfo::Mode rmode) { … }

// -----------------------------------------------------------------------------
// Implementation of Assembler.

Assembler::Assembler(const AssemblerOptions& options,
                     std::unique_ptr<AssemblerBuffer> buffer)
    : … { … }

void Assembler::GetCode(Isolate* isolate, CodeDesc* desc) { … }
void Assembler::GetCode(LocalIsolate* isolate, CodeDesc* desc,
                        SafepointTableBuilderBase* safepoint_table_builder,
                        int handler_table_offset) { … }

void Assembler::FinalizeJumpOptimizationInfo() { … }

#if defined(V8_OS_WIN_X64)
win64_unwindinfo::BuiltinUnwindInfo Assembler::GetUnwindInfo() const {
  DCHECK(options().collect_win64_unwind_info);
  DCHECK_NOT_NULL(xdata_encoder_);
  return xdata_encoder_->unwinding_info();
}
#endif

void Assembler::Align(int m) { … }

void Assembler::AlignForJCCErratum(int inst_size) { … }

void Assembler::CodeTargetAlign() { … }

void Assembler::LoopHeaderAlign() { … }

bool Assembler::IsNop(Address addr) { … }

bool Assembler::IsJmpRel(Address addr) { … }

void Assembler::bind_to(Label* L, int pos) { … }

void Assembler::bind(Label* L) { … }

void Assembler::record_farjmp_position(Label* L, int pos) { … }

bool Assembler::is_optimizable_farjmp(int idx) { … }

void Assembler::GrowBuffer() { … }

void Assembler::emit_operand(int code, Operand adr) { … }

void Assembler::emit_label_operand(int code, Label* label, int addend) { … }

// Assembler Instruction implementations.

void Assembler::arithmetic_op(uint8_t opcode, Register reg, Operand op,
                              int size) { … }

void Assembler::arithmetic_op(uint8_t opcode, Register reg, Register rm_reg,
                              int size) { … }

void Assembler::arithmetic_op_16(uint8_t opcode, Register reg,
                                 Register rm_reg) { … }

void Assembler::arithmetic_op_16(uint8_t opcode, Register reg, Operand rm_reg) { … }

void Assembler::arithmetic_op_8(uint8_t opcode, Register reg, Operand op) { … }

void Assembler::arithmetic_op_8(uint8_t opcode, Register reg, Register rm_reg) { … }

void Assembler::immediate_arithmetic_op(uint8_t subcode, Register dst,
                                        Immediate src, int size) { … }

void Assembler::immediate_arithmetic_op(uint8_t subcode, Operand dst,
                                        Immediate src, int size) { … }

void Assembler::immediate_arithmetic_op_16(uint8_t subcode, Register dst,
                                           Immediate src) { … }

void Assembler::immediate_arithmetic_op_16(uint8_t subcode, Operand dst,
                                           Immediate src) { … }

void Assembler::immediate_arithmetic_op_8(uint8_t subcode, Operand dst,
                                          Immediate src) { … }

void Assembler::immediate_arithmetic_op_8(uint8_t subcode, Register dst,
                                          Immediate src) { … }

void Assembler::shift(Register dst, Immediate shift_amount, int subcode,
                      int size) { … }

void Assembler::shift(Operand dst, Immediate shift_amount, int subcode,
                      int size) { … }

void Assembler::shift(Register dst, int subcode, int size) { … }

void Assembler::shift(Operand dst, int subcode, int size) { … }

void Assembler::bswapl(Register dst) { … }

void Assembler::bswapq(Register dst) { … }

void Assembler::btq(Operand dst, Register src) { … }

void Assembler::btsq(Operand dst, Register src) { … }

void Assembler::btsq(Register dst, Immediate imm8) { … }

void Assembler::btrq(Register dst, Immediate imm8) { … }

void Assembler::bsrl(Register dst, Register src) { … }

void Assembler::bsrl(Register dst, Operand src) { … }

void Assembler::bsrq(Register dst, Register src) { … }

void Assembler::bsrq(Register dst, Operand src) { … }

void Assembler::bsfl(Register dst, Register src) { … }

void Assembler::bsfl(Register dst, Operand src) { … }

void Assembler::bsfq(Register dst, Register src) { … }

void Assembler::bsfq(Register dst, Operand src) { … }

void Assembler::pblendw(XMMRegister dst, Operand src, uint8_t mask) { … }

void Assembler::pblendw(XMMRegister dst, XMMRegister src, uint8_t mask) { … }

void Assembler::palignr(XMMRegister dst, Operand src, uint8_t mask) { … }

void Assembler::palignr(XMMRegister dst, XMMRegister src, uint8_t mask) { … }

void Assembler::call(Label* L) { … }

void Assembler::call(Handle<Code> target, RelocInfo::Mode rmode) { … }

void Assembler::near_call(intptr_t disp, RelocInfo::Mode rmode) { … }

void Assembler::near_jmp(intptr_t disp, RelocInfo::Mode rmode) { … }

void Assembler::near_j(Condition cc, intptr_t disp, RelocInfo::Mode rmode) { … }

void Assembler::call(Register adr) { … }

void Assembler::call(Operand op) { … }

void Assembler::clc() { … }

void Assembler::cld() { … }

void Assembler::cdq() { … }

void Assembler::cmovq(Condition cc, Register dst, Register src) { … }

void Assembler::cmovq(Condition cc, Register dst, Operand src) { … }

void Assembler::cmovl(Condition cc, Register dst, Register src) { … }

void Assembler::cmovl(Condition cc, Register dst, Operand src) { … }

void Assembler::cmpb_al(Immediate imm8) { … }

void Assembler::lock() { … }

void Assembler::xaddb(Operand dst, Register src) { … }

void Assembler::xaddw(Operand dst, Register src) { … }

void Assembler::xaddl(Operand dst, Register src) { … }

void Assembler::xaddq(Operand dst, Register src) { … }

void Assembler::cmpxchgb(Operand dst, Register src) { … }

void Assembler::cmpxchgw(Operand dst, Register src) { … }

void Assembler::emit_cmpxchg(Operand dst, Register src, int size) { … }

void Assembler::mfence() { … }

void Assembler::lfence() { … }

void Assembler::cpuid() { … }

void Assembler::cqo() { … }

void Assembler::emit_dec(Register dst, int size) { … }

void Assembler::emit_dec(Operand dst, int size) { … }

void Assembler::decb(Register dst) { … }

void Assembler::decb(Operand dst) { … }

void Assembler::hlt() { … }

void Assembler::endbr64() { … }

void Assembler::emit_idiv(Register src, int size) { … }

void Assembler::emit_div(Register src, int size) { … }

void Assembler::emit_imul(Register src, int size) { … }

void Assembler::emit_imul(Operand src, int size) { … }

void Assembler::emit_imul(Register dst, Register src, int size) { … }

void Assembler::emit_imul(Register dst, Operand src, int size) { … }

void Assembler::emit_imul(Register dst, Register src, Immediate imm, int size) { … }

void Assembler::emit_imul(Register dst, Operand src, Immediate imm, int size) { … }

void Assembler::emit_inc(Register dst, int size) { … }

void Assembler::emit_inc(Operand dst, int size) { … }

void Assembler::int3() { … }

void Assembler::j(Condition cc, Label* L, Label::Distance distance) { … }

void Assembler::j(Condition cc, Address entry, RelocInfo::Mode rmode) { … }

void Assembler::j(Condition cc, Handle<Code> target, RelocInfo::Mode rmode) { … }

void Assembler::jmp_rel(int32_t offset) { … }

void Assembler::jmp(Label* L, Label::Distance distance) { … }

void Assembler::jmp(Handle<Code> target, RelocInfo::Mode rmode) { … }

#ifdef V8_ENABLE_CET_IBT

void Assembler::jmp(Register target, bool notrack) {
  EnsureSpace ensure_space(this);
  if (notrack) {
    emit(0x3e);
  }
  // Opcode FF/4 r64.
  emit_optional_rex_32(target);
  emit(0xFF);
  emit_modrm(0x4, target);
}

void Assembler::jmp(Operand src, bool notrack) {
  EnsureSpace ensure_space(this);
  if (notrack) {
    emit(0x3e);
  }
  // Opcode FF/4 m64.
  emit_optional_rex_32(src);
  emit(0xFF);
  emit_operand(0x4, src);
}

#else  // V8_ENABLE_CET_IBT

void Assembler::jmp(Register target) { … }

void Assembler::jmp(Operand src) { … }

#endif

void Assembler::emit_lea(Register dst, Operand src, int size) { … }

void Assembler::load_rax(Address value, RelocInfo::Mode mode) { … }

void Assembler::load_rax(ExternalReference ref) { … }

void Assembler::leave() { … }

void Assembler::movb(Register dst, Operand src) { … }

void Assembler::movb(Register dst, Immediate imm) { … }

void Assembler::movb(Operand dst, Register src) { … }

void Assembler::movb(Operand dst, Immediate imm) { … }

void Assembler::movw(Register dst, Operand src) { … }

void Assembler::movw(Operand dst, Register src) { … }

void Assembler::movw(Operand dst, Immediate imm) { … }

void Assembler::emit_mov(Register dst, Operand src, int size) { … }

void Assembler::emit_mov(Register dst, Register src, int size) { … }

void Assembler::emit_mov(Operand dst, Register src, int size) { … }

void Assembler::emit_mov(Register dst, Immediate value, int size) { … }

void Assembler::emit_mov(Operand dst, Immediate value, int size) { … }

void Assembler::emit_mov(Register dst, Immediate64 value, int size) { … }

void Assembler::movq_imm64(Register dst, int64_t value) { … }

void Assembler::movq_heap_number(Register dst, double value) { … }

// Loads the ip-relative location of the src label into the target location
// (as a 32-bit offset sign extended to 64-bit).
void Assembler::movl(Operand dst, Label* src) { … }

void Assembler::movsxbl(Register dst, Register src) { … }

void Assembler::movsxbl(Register dst, Operand src) { … }

void Assembler::movsxbq(Register dst, Operand src) { … }

void Assembler::movsxbq(Register dst, Register src) { … }

void Assembler::movsxwl(Register dst, Register src) { … }

void Assembler::movsxwl(Register dst, Operand src) { … }

void Assembler::movsxwq(Register dst, Operand src) { … }

void Assembler::movsxwq(Register dst, Register src) { … }

void Assembler::movsxlq(Register dst, Register src) { … }

void Assembler::movsxlq(Register dst, Operand src) { … }

void Assembler::emit_movzxb(Register dst, Operand src, int size) { … }

void Assembler::emit_movzxb(Register dst, Register src, int size) { … }

void Assembler::emit_movzxw(Register dst, Operand src, int size) { … }

void Assembler::emit_movzxw(Register dst, Register src, int size) { … }

void Assembler::repmovsb() { … }

void Assembler::repmovsw() { … }

void Assembler::emit_repmovs(int size) { … }

void Assembler::repstosl() { … }

void Assembler::repstosq() { … }

void Assembler::mull(Register src) { … }

void Assembler::mull(Operand src) { … }

void Assembler::mulq(Register src) { … }

void Assembler::mulq(Operand src) { … }

void Assembler::negb(Register reg) { … }

void Assembler::negw(Register reg) { … }

void Assembler::negl(Register reg) { … }

void Assembler::negq(Register reg) { … }

void Assembler::negb(Operand op) { … }

void Assembler::negw(Operand op) { … }

void Assembler::negl(Operand op) { … }

void Assembler::negq(Operand op) { … }

void Assembler::nop() { … }

void Assembler::emit_not(Register dst, int size) { … }

void Assembler::emit_not(Operand dst, int size) { … }

void Assembler::Nop(int n) { … }

void Assembler::emit_trace_instruction(Immediate markid) { … }

void Assembler::popq(Register dst) { … }

void Assembler::popq(Operand dst) { … }

void Assembler::popfq() { … }

void Assembler::pushq(Register src) { … }

void Assembler::pushq(Operand src) { … }

void Assembler::pushq(Immediate value) { … }

void Assembler::pushq_imm32(int32_t imm32) { … }

void Assembler::pushfq() { … }

void Assembler::incsspq(Register number_of_words) { … }

void Assembler::ret(int imm16) { … }

void Assembler::ud2() { … }

void Assembler::setcc(Condition cc, Register reg) { … }

void Assembler::shld(Register dst, Register src) { … }

void Assembler::shrd(Register dst, Register src) { … }

void Assembler::xchgb(Register reg, Operand op) { … }

void Assembler::xchgw(Register reg, Operand op) { … }

void Assembler::emit_xchg(Register dst, Register src, int size) { … }

void Assembler::emit_xchg(Register dst, Operand src, int size) { … }

void Assembler::store_rax(Address dst, RelocInfo::Mode mode) { … }

void Assembler::store_rax(ExternalReference ref) { … }

void Assembler::sub_sp_32(uint32_t imm) { … }

void Assembler::testb(Register dst, Register src) { … }

void Assembler::testb(Register reg, Immediate mask) { … }

void Assembler::testb(Operand op, Immediate mask) { … }

void Assembler::testb(Operand op, Register reg) { … }

void Assembler::testw(Register dst, Register src) { … }

void Assembler::testw(Register reg, Immediate mask) { … }

void Assembler::testw(Operand op, Immediate mask) { … }

void Assembler::testw(Operand op, Register reg) { … }

void Assembler::emit_test(Register dst, Register src, int size) { … }

void Assembler::emit_test(Register reg, Immediate mask, int size) { … }

void Assembler::emit_test(Operand op, Immediate mask, int size) { … }

void Assembler::emit_test(Operand op, Register reg, int size) { … }

// FPU instructions.

void Assembler::fld(int i) { … }

void Assembler::fld1() { … }

void Assembler::fldz() { … }

void Assembler::fldpi() { … }

void Assembler::fldln2() { … }

void Assembler::fld_s(Operand adr) { … }

void Assembler::fld_d(Operand adr) { … }

void Assembler::fstp_s(Operand adr) { … }

void Assembler::fstp_d(Operand adr) { … }

void Assembler::fstp(int index) { … }

void Assembler::fild_s(Operand adr) { … }

void Assembler::fild_d(Operand adr) { … }

void Assembler::fistp_s(Operand adr) { … }

void Assembler::fisttp_s(Operand adr) { … }

void Assembler::fisttp_d(Operand adr) { … }

void Assembler::fist_s(Operand adr) { … }

void Assembler::fistp_d(Operand adr) { … }

void Assembler::fabs() { … }

void Assembler::fchs() { … }

void Assembler::fcos() { … }

void Assembler::fsin() { … }

void Assembler::fptan() { … }

void Assembler::fyl2x() { … }

void Assembler::f2xm1() { … }

void Assembler::fscale() { … }

void Assembler::fninit() { … }

void Assembler::fadd(int i) { … }

void Assembler::fsub(int i) { … }

void Assembler::fisub_s(Operand adr) { … }

void Assembler::fmul(int i) { … }

void Assembler::fdiv(int i) { … }

void Assembler::faddp(int i) { … }

void Assembler::fsubp(int i) { … }

void Assembler::fsubrp(int i) { … }

void Assembler::fmulp(int i) { … }

void Assembler::fdivp(int i) { … }

void Assembler::fprem() { … }

void Assembler::fprem1() { … }

void Assembler::fxch(int i) { … }

void Assembler::fincstp() { … }

void Assembler::ffree(int i) { … }

void Assembler::ftst() { … }

void Assembler::fucomp(int i) { … }

void Assembler::fucompp() { … }

void Assembler::fucomi(int i) { … }

void Assembler::fucomip() { … }

void Assembler::fcompp() { … }

void Assembler::fnstsw_ax() { … }

void Assembler::fwait() { … }

void Assembler::frndint() { … }

void Assembler::fnclex() { … }

void Assembler::sahf() { … }

void Assembler::emit_farith(int b1, int b2, int i) { … }

// SSE 2 operations.

void Assembler::movd(XMMRegister dst, Register src) { … }

void Assembler::movd(XMMRegister dst, Operand src) { … }

void Assembler::movd(Register dst, XMMRegister src) { … }

void Assembler::movq(XMMRegister dst, Register src) { … }

void Assembler::movq(XMMRegister dst, Operand src) { … }

void Assembler::movq(Register dst, XMMRegister src) { … }

void Assembler::movq(XMMRegister dst, XMMRegister src) { … }

void Assembler::movdqa(Operand dst, XMMRegister src) { … }

void Assembler::movdqa(XMMRegister dst, Operand src) { … }

void Assembler::movdqa(XMMRegister dst, XMMRegister src) { … }

void Assembler::movdqu(Operand dst, XMMRegister src) { … }

void Assembler::movdqu(XMMRegister dst, Operand src) { … }

void Assembler::movdqu(XMMRegister dst, XMMRegister src) { … }

void Assembler::pinsrw(XMMRegister dst, Register src, uint8_t imm8) { … }

void Assembler::pinsrw(XMMRegister dst, Operand src, uint8_t imm8) { … }

void Assembler::pextrq(Register dst, XMMRegister src, int8_t imm8) { … }

void Assembler::pinsrq(XMMRegister dst, Register src, uint8_t imm8) { … }

void Assembler::pinsrq(XMMRegister dst, Operand src, uint8_t imm8) { … }

void Assembler::pinsrd(XMMRegister dst, Register src, uint8_t imm8) { … }

void Assembler::pinsrd(XMMRegister dst, Operand src, uint8_t imm8) { … }

void Assembler::pinsrb(XMMRegister dst, Register src, uint8_t imm8) { … }

void Assembler::pinsrb(XMMRegister dst, Operand src, uint8_t imm8) { … }

void Assembler::insertps(XMMRegister dst, XMMRegister src, uint8_t imm8) { … }

void Assembler::insertps(XMMRegister dst, Operand src, uint8_t imm8) { … }

void Assembler::movsd(Operand dst, XMMRegister src) { … }

void Assembler::movsd(XMMRegister dst, XMMRegister src) { … }

void Assembler::movsd(XMMRegister dst, Operand src) { … }

void Assembler::movaps(XMMRegister dst, XMMRegister src) { … }

void Assembler::movaps(XMMRegister dst, Operand src) { … }

void Assembler::shufps(XMMRegister dst, XMMRegister src, uint8_t imm8) { … }

void Assembler::movapd(XMMRegister dst, XMMRegister src) { … }

void Assembler::movupd(XMMRegister dst, Operand src) { … }

void Assembler::movupd(Operand dst, XMMRegister src) { … }

void Assembler::ucomiss(XMMRegister dst, XMMRegister src) { … }

void Assembler::ucomiss(XMMRegister dst, Operand src) { … }

void Assembler::movss(XMMRegister dst, XMMRegister src) { … }

void Assembler::movss(XMMRegister dst, Operand src) { … }

void Assembler::movss(Operand src, XMMRegister dst) { … }

void Assembler::movlps(XMMRegister dst, Operand src) { … }

void Assembler::movlps(Operand src, XMMRegister dst) { … }

void Assembler::movhps(XMMRegister dst, Operand src) { … }

void Assembler::movhps(Operand src, XMMRegister dst) { … }

void Assembler::cmpps(XMMRegister dst, XMMRegister src, int8_t cmp) { … }

void Assembler::cmpps(XMMRegister dst, Operand src, int8_t cmp) { … }

void Assembler::cmppd(XMMRegister dst, XMMRegister src, int8_t cmp) { … }

void Assembler::cmppd(XMMRegister dst, Operand src, int8_t cmp) { … }

void Assembler::cvtdq2pd(XMMRegister dst, XMMRegister src) { … }

void Assembler::cvttss2si(Register dst, Operand src) { … }

void Assembler::cvttss2si(Register dst, XMMRegister src) { … }

void Assembler::cvttsd2si(Register dst, Operand src) { … }

void Assembler::cvttsd2si(Register dst, XMMRegister src) { … }

void Assembler::cvttss2siq(Register dst, XMMRegister src) { … }

void Assembler::cvttss2siq(Register dst, Operand src) { … }

void Assembler::cvttsd2siq(Register dst, XMMRegister src) { … }

void Assembler::cvttsd2siq(Register dst, Operand src) { … }

void Assembler::cvttps2dq(XMMRegister dst, Operand src) { … }

void Assembler::cvttps2dq(XMMRegister dst, XMMRegister src) { … }

void Assembler::cvtlsi2sd(XMMRegister dst, Operand src) { … }

void Assembler::cvtlsi2sd(XMMRegister dst, Register src) { … }

void Assembler::cvtlsi2ss(XMMRegister dst, Operand src) { … }

void Assembler::cvtlsi2ss(XMMRegister dst, Register src) { … }

void Assembler::cvtqsi2ss(XMMRegister dst, Operand src) { … }

void Assembler::cvtqsi2ss(XMMRegister dst, Register src) { … }

void Assembler::cvtqsi2sd(XMMRegister dst, Operand src) { … }

void Assembler::cvtqsi2sd(XMMRegister dst, Register src) { … }

void Assembler::cvtsd2si(Register dst, XMMRegister src) { … }

void Assembler::cvtsd2siq(Register dst, XMMRegister src) { … }

void Assembler::haddps(XMMRegister dst, XMMRegister src) { … }

void Assembler::haddps(XMMRegister dst, Operand src) { … }

void Assembler::cmpeqss(XMMRegister dst, XMMRegister src) { … }

void Assembler::cmpeqsd(XMMRegister dst, XMMRegister src) { … }

void Assembler::cmpltsd(XMMRegister dst, XMMRegister src) { … }

void Assembler::roundss(XMMRegister dst, XMMRegister src, RoundingMode mode) { … }

void Assembler::roundss(XMMRegister dst, Operand src, RoundingMode mode) { … }

void Assembler::roundsd(XMMRegister dst, XMMRegister src, RoundingMode mode) { … }

void Assembler::roundsd(XMMRegister dst, Operand src, RoundingMode mode) { … }

void Assembler::roundps(XMMRegister dst, XMMRegister src, RoundingMode mode) { … }

void Assembler::roundpd(XMMRegister dst, XMMRegister src, RoundingMode mode) { … }

void Assembler::movmskpd(Register dst, XMMRegister src) { … }

void Assembler::movmskps(Register dst, XMMRegister src) { … }

void Assembler::pmovmskb(Register dst, XMMRegister src) { … }

// AVX instructions
#define VMOV_DUP …
VMOV_DUP
VMOV_DUP
#undef VMOV_DUP

#define BROADCAST …
BROADCAST
BROADCAST
BROADCAST
#undef BROADCAST

void Assembler::vinserti128(YMMRegister dst, YMMRegister src1, XMMRegister src2,
                            uint8_t imm8) { … }

void Assembler::vperm2f128(YMMRegister dst, YMMRegister src1, YMMRegister src2,
                           uint8_t imm8) { … }

void Assembler::vextractf128(XMMRegister dst, YMMRegister src, uint8_t imm8) { … }

template <typename Reg1, typename Reg2, typename Op>
void Assembler::fma_instr(uint8_t op, Reg1 dst, Reg2 src1, Op src2,
                          VectorLength l, SIMDPrefix pp, LeadingOpcode m,
                          VexW w) { … }

template EXPORT_TEMPLATE_DEFINE(…) void Assembler::fma_instr(
    uint8_t op, XMMRegister dst, XMMRegister src1, XMMRegister src2,
    VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w);

template EXPORT_TEMPLATE_DEFINE(…) void Assembler::fma_instr(
    uint8_t op, YMMRegister dst, YMMRegister src1, YMMRegister src2,
    VectorLength l, SIMDPrefix pp, LeadingOpcode m, VexW w);

template EXPORT_TEMPLATE_DEFINE(…) void Assembler::fma_instr(
    uint8_t op, XMMRegister dst, XMMRegister src1, Operand src2, VectorLength l,
    SIMDPrefix pp, LeadingOpcode m, VexW w);

template EXPORT_TEMPLATE_DEFINE(…) void Assembler::fma_instr(
    uint8_t op, YMMRegister dst, YMMRegister src1, Operand src2, VectorLength l,
    SIMDPrefix pp, LeadingOpcode m, VexW w);

void Assembler::vmovd(XMMRegister dst, Register src) { … }

void Assembler::vmovd(XMMRegister dst, Operand src) { … }

void Assembler::vmovd(Register dst, XMMRegister src) { … }

void Assembler::vmovq(XMMRegister dst, Register src) { … }

void Assembler::vmovq(XMMRegister dst, Operand src) { … }

void Assembler::vmovq(Register dst, XMMRegister src) { … }

void Assembler::vmovdqa(XMMRegister dst, Operand src) { … }

void Assembler::vmovdqa(XMMRegister dst, XMMRegister src) { … }

void Assembler::vmovdqa(YMMRegister dst, Operand src) { … }

void Assembler::vmovdqa(YMMRegister dst, YMMRegister src) { … }

void Assembler::vmovdqu(XMMRegister dst, Operand src) { … }

void Assembler::vmovdqu(Operand dst, XMMRegister src) { … }

void Assembler::vmovdqu(XMMRegister dst, XMMRegister src) { … }

void Assembler::vmovdqu(YMMRegister dst, Operand src) { … }

void Assembler::vmovdqu(Operand dst, YMMRegister src) { … }

void Assembler::vmovdqu(YMMRegister dst, YMMRegister src) { … }

void Assembler::vmovlps(XMMRegister dst, XMMRegister src1, Operand src2) { … }

void Assembler::vmovlps(Operand dst, XMMRegister src) { … }

void Assembler::vmovhps(XMMRegister dst, XMMRegister src1, Operand src2) { … }

void Assembler::vmovhps(Operand dst, XMMRegister src) { … }

void Assembler::vinstr(uint8_t op, XMMRegister dst, XMMRegister src1,
                       XMMRegister src2, SIMDPrefix pp, LeadingOpcode m, VexW w,
                       CpuFeature feature) { … }

void Assembler::vinstr(uint8_t op, XMMRegister dst, XMMRegister src1,
                       Operand src2, SIMDPrefix pp, LeadingOpcode m, VexW w,
                       CpuFeature feature) { … }

template <typename Reg1, typename Reg2, typename Op>
void Assembler::vinstr(uint8_t op, Reg1 dst, Reg2 src1, Op src2, SIMDPrefix pp,
                       LeadingOpcode m, VexW w, CpuFeature feature) { … }

template EXPORT_TEMPLATE_DEFINE(…) void Assembler::vinstr(
    uint8_t op, YMMRegister dst, YMMRegister src1, YMMRegister src2,
    SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature);
template EXPORT_TEMPLATE_DEFINE(…) void Assembler::vinstr(
    uint8_t op, YMMRegister dst, XMMRegister src1, XMMRegister src2,
    SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature);
template EXPORT_TEMPLATE_DEFINE(…) void Assembler::vinstr(
    uint8_t op, YMMRegister dst, YMMRegister src1, Operand src2, SIMDPrefix pp,
    LeadingOpcode m, VexW w, CpuFeature feature);
template EXPORT_TEMPLATE_DEFINE(…) void Assembler::vinstr(
    uint8_t op, YMMRegister dst, YMMRegister src1, XMMRegister src2,
    SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature);
template EXPORT_TEMPLATE_DEFINE(…) void Assembler::vinstr(
    uint8_t op, YMMRegister dst, XMMRegister src1, Operand src2, SIMDPrefix pp,
    LeadingOpcode m, VexW w, CpuFeature feature);
template EXPORT_TEMPLATE_DEFINE(…) void Assembler::vinstr(
    uint8_t op, YMMRegister dst, XMMRegister src1, YMMRegister src2,
    SIMDPrefix pp, LeadingOpcode m, VexW w, CpuFeature feature);

void Assembler::vps(uint8_t op, XMMRegister dst, XMMRegister src1,
                    XMMRegister src2) { … }

void Assembler::vps(uint8_t op, YMMRegister dst, YMMRegister src1,
                    YMMRegister src2) { … }

void Assembler::vps(uint8_t op, XMMRegister dst, XMMRegister src1,
                    Operand src2) { … }

void Assembler::vps(uint8_t op, YMMRegister dst, YMMRegister src1,
                    Operand src2) { … }

void Assembler::vps(uint8_t op, XMMRegister dst, XMMRegister src1,
                    XMMRegister src2, uint8_t imm8) { … }

void Assembler::vps(uint8_t op, YMMRegister dst, YMMRegister src1,
                    YMMRegister src2, uint8_t imm8) { … }

#define VPD …
VPD
VPD
VPD
#undef VPD

#define F16C …

void Assembler::vcvtph2ps(XMMRegister dst, XMMRegister src) { … }

void Assembler::vcvtph2ps(YMMRegister dst, XMMRegister src) { … }

void Assembler::vcvtps2ph(XMMRegister dst, YMMRegister src, uint8_t imm8) { … }

void Assembler::vcvtps2ph(XMMRegister dst, XMMRegister src, uint8_t imm8) { … }

#undef F16C

void Assembler::vucomiss(XMMRegister dst, XMMRegister src) { … }

void Assembler::vucomiss(XMMRegister dst, Operand src) { … }

void Assembler::vpmovmskb(Register dst, XMMRegister src) { … }

void Assembler::vss(uint8_t op, XMMRegister dst, XMMRegister src1,
                    XMMRegister src2) { … }

void Assembler::vss(uint8_t op, XMMRegister dst, XMMRegister src1,
                    Operand src2) { … }

void Assembler::bmi1q(uint8_t op, Register reg, Register vreg, Register rm) { … }

void Assembler::bmi1q(uint8_t op, Register reg, Register vreg, Operand rm) { … }

void Assembler::bmi1l(uint8_t op, Register reg, Register vreg, Register rm) { … }

void Assembler::bmi1l(uint8_t op, Register reg, Register vreg, Operand rm) { … }

void Assembler::tzcntq(Register dst, Register src) { … }

void Assembler::tzcntq(Register dst, Operand src) { … }

void Assembler::tzcntl(Register dst, Register src) { … }

void Assembler::tzcntl(Register dst, Operand src) { … }

void Assembler::lzcntq(Register dst, Register src) { … }

void Assembler::lzcntq(Register dst, Operand src) { … }

void Assembler::lzcntl(Register dst, Register src) { … }

void Assembler::lzcntl(Register dst, Operand src) { … }

void Assembler::popcntq(Register dst, Register src) { … }

void Assembler::popcntq(Register dst, Operand src) { … }

void Assembler::popcntl(Register dst, Register src) { … }

void Assembler::popcntl(Register dst, Operand src) { … }

void Assembler::bmi2q(SIMDPrefix pp, uint8_t op, Register reg, Register vreg,
                      Register rm) { … }

void Assembler::bmi2q(SIMDPrefix pp, uint8_t op, Register reg, Register vreg,
                      Operand rm) { … }

void Assembler::bmi2l(SIMDPrefix pp, uint8_t op, Register reg, Register vreg,
                      Register rm) { … }

void Assembler::bmi2l(SIMDPrefix pp, uint8_t op, Register reg, Register vreg,
                      Operand rm) { … }

void Assembler::rorxq(Register dst, Register src, uint8_t imm8) { … }

void Assembler::rorxq(Register dst, Operand src, uint8_t imm8) { … }

void Assembler::rorxl(Register dst, Register src, uint8_t imm8) { … }

void Assembler::rorxl(Register dst, Operand src, uint8_t imm8) { … }

void Assembler::pause() { … }

void Assembler::movups(XMMRegister dst, XMMRegister src) { … }

void Assembler::movups(XMMRegister dst, Operand src) { … }

void Assembler::movups(Operand dst, XMMRegister src) { … }

void Assembler::sse_instr(XMMRegister dst, XMMRegister src, uint8_t escape,
                          uint8_t opcode) { … }

void Assembler::sse_instr(XMMRegister dst, Operand src, uint8_t escape,
                          uint8_t opcode) { … }

void Assembler::sse2_instr(XMMRegister dst, XMMRegister src, uint8_t prefix,
                           uint8_t escape, uint8_t opcode) { … }

void Assembler::sse2_instr(XMMRegister dst, Operand src, uint8_t prefix,
                           uint8_t escape, uint8_t opcode) { … }

void Assembler::ssse3_instr(XMMRegister dst, XMMRegister src, uint8_t prefix,
                            uint8_t escape1, uint8_t escape2, uint8_t opcode) { … }

void Assembler::ssse3_instr(XMMRegister dst, Operand src, uint8_t prefix,
                            uint8_t escape1, uint8_t escape2, uint8_t opcode) { … }

void Assembler::sse4_instr(XMMRegister dst, Register src, uint8_t prefix,
                           uint8_t escape1, uint8_t escape2, uint8_t opcode,
                           int8_t imm8) { … }

void Assembler::sse4_instr(XMMRegister dst, XMMRegister src, uint8_t prefix,
                           uint8_t escape1, uint8_t escape2, uint8_t opcode) { … }

void Assembler::sse4_instr(XMMRegister dst, Operand src, uint8_t prefix,
                           uint8_t escape1, uint8_t escape2, uint8_t opcode) { … }

void Assembler::sse4_instr(Register dst, XMMRegister src, uint8_t prefix,
                           uint8_t escape1, uint8_t escape2, uint8_t opcode,
                           int8_t imm8) { … }

void Assembler::sse4_instr(Operand dst, XMMRegister src, uint8_t prefix,
                           uint8_t escape1, uint8_t escape2, uint8_t opcode,
                           int8_t imm8) { … }

void Assembler::sse4_2_instr(XMMRegister dst, XMMRegister src, uint8_t prefix,
                             uint8_t escape1, uint8_t escape2, uint8_t opcode) { … }

void Assembler::sse4_2_instr(XMMRegister dst, Operand src, uint8_t prefix,
                             uint8_t escape1, uint8_t escape2, uint8_t opcode) { … }

void Assembler::lddqu(XMMRegister dst, Operand src) { … }

void Assembler::movddup(XMMRegister dst, XMMRegister src) { … }

void Assembler::movddup(XMMRegister dst, Operand src) { … }

void Assembler::movshdup(XMMRegister dst, XMMRegister src) { … }

void Assembler::psrldq(XMMRegister dst, uint8_t shift) { … }

void Assembler::pshufhw(XMMRegister dst, XMMRegister src, uint8_t shuffle) { … }

void Assembler::pshufhw(XMMRegister dst, Operand src, uint8_t shuffle) { … }

void Assembler::pshuflw(XMMRegister dst, XMMRegister src, uint8_t shuffle) { … }

void Assembler::pshuflw(XMMRegister dst, Operand src, uint8_t shuffle) { … }

void Assembler::pshufd(XMMRegister dst, XMMRegister src, uint8_t shuffle) { … }

void Assembler::pshufd(XMMRegister dst, Operand src, uint8_t shuffle) { … }

void Assembler::emit_sse_operand(XMMRegister reg, Operand adr) { … }

void Assembler::emit_sse_operand(Register reg, Operand adr) { … }

void Assembler::emit_sse_operand(XMMRegister dst, XMMRegister src) { … }

void Assembler::emit_sse_operand(XMMRegister dst, Register src) { … }

void Assembler::emit_sse_operand(Register dst, XMMRegister src) { … }

void Assembler::emit_sse_operand(XMMRegister dst) { … }

void Assembler::db(uint8_t data) { … }

void Assembler::dd(uint32_t data) { … }

void Assembler::dq(uint64_t data) { … }

void Assembler::dq(Label* label) { … }

void Assembler::WriteBuiltinJumpTableEntry(Label* label, const int table_pos) { … }

// Relocation information implementations.

void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) { … }

const int RelocInfo::kApplyMask = …;

bool RelocInfo::IsCodedSpecially() { … }

bool RelocInfo::IsInConstantPool() { … }

}  // namespace internal
}  // namespace v8

#endif  // V8_TARGET_ARCH_X64
chromium/v8/src/codegen/x64/assembler-x64.cc
