llvm/lib/Target/Mips/MipsGenDisassemblerTables.inc

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|*  * Mips Disassembler                                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/LEB128.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/SubtargetFeature.h"
#include <assert.h>

namespace llvm {

// Helper functions for extracting fields from encoded instructions.
// InsnType must either be integral or an APInt-like object that must:
// * be default-constructible and copy-constructible
// * be constructible from an APInt (this can be private)
// * Support insertBits(bits, startBit, numBits)
// * Support extractBitsAsZExtValue(numBits, startBit)
// * Support the ~, &, ==, and != operators with other objects of the same type
// * Support the != and bitwise & with uint64_t
// * Support put (<<) to raw_ostream&
template <typename InsnType>
#if defined(_MSC_VER) && !defined(__clang__)
__declspec(noinline)
#endif
static std::enable_if_t<std::is_integral<InsnType>::value, InsnType>
fieldFromInstruction(const InsnType &insn, unsigned startBit,
                     unsigned numBits) { … }

template <typename InsnType>
static std::enable_if_t<!std::is_integral<InsnType>::value, uint64_t>
fieldFromInstruction(const InsnType &insn, unsigned startBit,
                     unsigned numBits) { … }

// Helper function for inserting bits extracted from an encoded instruction into
// a field.
template <typename InsnType>
static std::enable_if_t<std::is_integral<InsnType>::value>
insertBits(InsnType &field, InsnType bits, unsigned startBit, unsigned numBits) { … }

template <typename InsnType>
static std::enable_if_t<!std::is_integral<InsnType>::value>
insertBits(InsnType &field, uint64_t bits, unsigned startBit, unsigned numBits) { … }

static bool Check(DecodeStatus &Out, DecodeStatus In) { … }

static const uint8_t DecoderTable16[] = …;

static const uint8_t DecoderTable32[] = …;

static const uint8_t DecoderTableCOP3_32[] = …;

static const uint8_t DecoderTableCnMips32[] = …;

static const uint8_t DecoderTableCnMipsP32[] = …;

static const uint8_t DecoderTableMicroMips16[] = …;

static const uint8_t DecoderTableMicroMips32[] = …;

static const uint8_t DecoderTableMicroMipsDSP32[] = …;

static const uint8_t DecoderTableMicroMipsFP6432[] = …;

static const uint8_t DecoderTableMicroMipsR616[] = …;

static const uint8_t DecoderTableMicroMipsR632[] = …;

static const uint8_t DecoderTableMicroMipsR6_Ambiguous32[] = …;

static const uint8_t DecoderTableMips32[] = …;

static const uint8_t DecoderTableMips32_64_PTR6432[] = …;

static const uint8_t DecoderTableMips32r6_64r632[] = …;

static const uint8_t DecoderTableMips32r6_64r6_Ambiguous32[] = …;

static const uint8_t DecoderTableMips32r6_64r6_BranchZero32[] = …;

static const uint8_t DecoderTableMips32r6_64r6_GP6432[] = …;

static const uint8_t DecoderTableMips32r6_64r6_PTR6432[] = …;

static const uint8_t DecoderTableMips6432[] = …;

static const uint8_t DecoderTableMipsDSP32[] = …;

static const uint8_t DecoderTableMipsFP6432[] = …;

static bool checkDecoderPredicate(unsigned Idx, const FeatureBitset &Bits) { … }

template <typename InsnType>
static DecodeStatus decodeToMCInst(DecodeStatus S, unsigned Idx, InsnType insn, MCInst &MI,
                                   uint64_t Address, const MCDisassembler *Decoder, bool &DecodeComplete) { … }

template <typename InsnType>
static DecodeStatus decodeInstruction(const uint8_t DecodeTable[], MCInst &MI,
                                      InsnType insn, uint64_t Address,
                                      const MCDisassembler *DisAsm,
                                      const MCSubtargetInfo &STI) { … }


} // end namespace llvm