# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-- -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=1 %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
define void @store_s64_gpr(ptr %addr) { ret void }
define void @store_s32_gpr(ptr %addr) { ret void }
define void @store_s16_gpr(ptr %addr) { ret void }
define void @store_s8_gpr(ptr %addr) { ret void }
define void @store_zero_s64_gpr(ptr %addr) { ret void }
define void @store_zero_s32_gpr(ptr %addr) { ret void }
define void @store_zero_s16(ptr %addr) { ret void }
define void @store_zero_s8(ptr %addr) { ret void }
define void @store_zero_look_through_cst(ptr %addr) { ret void }
define void @store_fi_s64_gpr() {
%ptr0 = alloca i64
ret void
}
define void @store_gep_128_s64_gpr(ptr %addr) { ret void }
define void @store_gep_512_s32_gpr(ptr %addr) { ret void }
define void @store_gep_64_s16_gpr(ptr %addr) { ret void }
define void @store_gep_1_s8_gpr(ptr %addr) { ret void }
define void @store_s64_fpr(ptr %addr) { ret void }
define void @store_s32_fpr(ptr %addr) { ret void }
define void @store_gep_8_s64_fpr(ptr %addr) { ret void }
define void @store_gep_8_s32_fpr(ptr %addr) { ret void }
define void @store_v2s32(ptr %addr) { ret void }
define void @store_v2s64(ptr %addr) { ret void }
define void @store_4xi16(<4 x i16> %v, ptr %ptr) { ret void }
define void @store_4xi32(<4 x i32> %v, ptr %ptr) { ret void }
define void @store_8xi16(<8 x i16> %v, ptr %ptr) { ret void }
define void @store_16xi8(<16 x i8> %v, ptr %ptr) { ret void }
@x = external hidden local_unnamed_addr global ptr, align 8
define void @store_adrp_add_low() { ret void }
define void @store_adrp_add_low_foldable_offset() { ret void }
define void @store_adrp_add_low_unfoldable_offset() { ret void }
define void @truncstores(ptr %addr) { ret void }
...
---
name: store_s64_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: store_s64_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: STRXui [[COPY1]], [[COPY]], 0 :: (store (s64) into %ir.addr)
%0(p0) = COPY $x0
%1(s64) = COPY $x1
G_STORE %1, %0 :: (store (s64) into %ir.addr)
...
---
name: store_s32_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0, $w1
; CHECK-LABEL: name: store_s32_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: STRWui [[COPY1]], [[COPY]], 0 :: (store (s32) into %ir.addr)
%0(p0) = COPY $x0
%1(s32) = COPY $w1
G_STORE %1, %0 :: (store (s32) into %ir.addr)
...
---
name: store_s16_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0, $w1
; CHECK-LABEL: name: store_s16_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: STRHHui [[COPY1]], [[COPY]], 0 :: (store (s16) into %ir.addr)
%0(p0) = COPY $x0
%2:gpr(s32) = COPY $w1
%1(s16) = G_TRUNC %2
G_STORE %1, %0 :: (store (s16) into %ir.addr)
...
---
name: store_s8_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0, $w1
; CHECK-LABEL: name: store_s8_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: STRBBui [[COPY1]], [[COPY]], 0 :: (store (s8) into %ir.addr)
%0(p0) = COPY $x0
%2:gpr(s32) = COPY $w1
%1(s8) = G_TRUNC %2
G_STORE %1, %0 :: (store (s8) into %ir.addr)
...
---
name: store_zero_s64_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: store_zero_s64_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRXui $xzr, [[COPY]], 0 :: (store (s64) into %ir.addr)
%0(p0) = COPY $x0
%1(s64) = G_CONSTANT i64 0
G_STORE %1, %0 :: (store (s64) into %ir.addr)
...
---
name: store_zero_s32_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_zero_s32_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRWui $wzr, [[COPY]], 0 :: (store (s32) into %ir.addr)
%0(p0) = COPY $x0
%1(s32) = G_CONSTANT i32 0
G_STORE %1, %0 :: (store (s32) into %ir.addr)
...
---
name: store_zero_s16
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_zero_s16
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRHHui $wzr, [[COPY]], 0 :: (store (s16))
%0:gpr(p0) = COPY $x0
%1:gpr(s16) = G_CONSTANT i16 0
G_STORE %1(s16), %0(p0) :: (store (s16))
...
---
name: store_zero_s8
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_zero_s8
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRBBui $wzr, [[COPY]], 0 :: (store (s8))
%0:gpr(p0) = COPY $x0
%1:gpr(s8) = G_CONSTANT i8 0
G_STORE %1(s8), %0(p0) :: (store (s8))
...
---
name: store_zero_look_through_cst
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_zero_look_through_cst
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRXui $xzr, [[COPY]], 0 :: (store (s64) into %ir.addr)
%0:gpr(p0) = COPY $x0
%1:gpr(s32) = G_CONSTANT i32 0
%2:gpr(s64) = G_ZEXT %1
G_STORE %2, %0 :: (store (s64) into %ir.addr)
...
---
name: store_fi_s64_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
stack:
- { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 }
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_fi_s64_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64all = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY [[COPY]]
; CHECK-NEXT: STRXui [[COPY1]], %stack.0.ptr0, 0 :: (store (p0))
%0(p0) = COPY $x0
%1(p0) = G_FRAME_INDEX %stack.0.ptr0
G_STORE %0, %1 :: (store (p0))
...
---
name: store_gep_128_s64_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: store_gep_128_s64_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: STRXui [[COPY1]], [[COPY]], 16 :: (store (s64) into %ir.addr)
%0(p0) = COPY $x0
%1(s64) = COPY $x1
%2(s64) = G_CONSTANT i64 128
%3(p0) = G_PTR_ADD %0, %2
G_STORE %1, %3 :: (store (s64) into %ir.addr)
...
---
name: store_gep_512_s32_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
body: |
bb.0:
liveins: $x0, $w1
; CHECK-LABEL: name: store_gep_512_s32_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: STRWui [[COPY1]], [[COPY]], 128 :: (store (s32) into %ir.addr)
%0(p0) = COPY $x0
%1(s32) = COPY $w1
%2(s64) = G_CONSTANT i64 512
%3(p0) = G_PTR_ADD %0, %2
G_STORE %1, %3 :: (store (s32) into %ir.addr)
...
---
name: store_gep_64_s16_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
body: |
bb.0:
liveins: $x0, $w1
; CHECK-LABEL: name: store_gep_64_s16_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: STRHHui [[COPY1]], [[COPY]], 32 :: (store (s16) into %ir.addr)
%0(p0) = COPY $x0
%4:gpr(s32) = COPY $w1
%1(s16) = G_TRUNC %4
%2(s64) = G_CONSTANT i64 64
%3(p0) = G_PTR_ADD %0, %2
G_STORE %1, %3 :: (store (s16) into %ir.addr)
...
---
name: store_gep_1_s8_gpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: gpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
body: |
bb.0:
liveins: $x0, $w1
; CHECK-LABEL: name: store_gep_1_s8_gpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
; CHECK-NEXT: STRBBui [[COPY1]], [[COPY]], 1 :: (store (s8) into %ir.addr)
%0(p0) = COPY $x0
%4:gpr(s32) = COPY $w1
%1(s8) = G_TRUNC %4
%2(s64) = G_CONSTANT i64 1
%3(p0) = G_PTR_ADD %0, %2
G_STORE %1, %3 :: (store (s8) into %ir.addr)
...
---
name: store_s64_fpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
body: |
bb.0:
liveins: $x0, $d1
; CHECK-LABEL: name: store_s64_fpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
; CHECK-NEXT: STRDui [[COPY1]], [[COPY]], 0 :: (store (s64) into %ir.addr)
%0(p0) = COPY $x0
%1(s64) = COPY $d1
G_STORE %1, %0 :: (store (s64) into %ir.addr)
...
---
name: store_s32_fpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
body: |
bb.0:
liveins: $x0, $s1
; CHECK-LABEL: name: store_s32_fpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
; CHECK-NEXT: STRSui [[COPY1]], [[COPY]], 0 :: (store (s32) into %ir.addr)
%0(p0) = COPY $x0
%1(s32) = COPY $s1
G_STORE %1, %0 :: (store (s32) into %ir.addr)
...
---
name: store_gep_8_s64_fpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
body: |
bb.0:
liveins: $x0, $d1
; CHECK-LABEL: name: store_gep_8_s64_fpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
; CHECK-NEXT: STRDui [[COPY1]], [[COPY]], 1 :: (store (s64) into %ir.addr)
%0(p0) = COPY $x0
%1(s64) = COPY $d1
%2(s64) = G_CONSTANT i64 8
%3(p0) = G_PTR_ADD %0, %2
G_STORE %1, %3 :: (store (s64) into %ir.addr)
...
---
name: store_gep_8_s32_fpr
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
- { id: 2, class: gpr }
- { id: 3, class: gpr }
body: |
bb.0:
liveins: $x0, $s1
; CHECK-LABEL: name: store_gep_8_s32_fpr
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
; CHECK-NEXT: STRSui [[COPY1]], [[COPY]], 2 :: (store (s32) into %ir.addr)
%0(p0) = COPY $x0
%1(s32) = COPY $s1
%2(s64) = G_CONSTANT i64 8
%3(p0) = G_PTR_ADD %0, %2
G_STORE %1, %3 :: (store (s32) into %ir.addr)
...
---
name: store_v2s32
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
body: |
bb.0:
liveins: $x0, $d1
; CHECK-LABEL: name: store_v2s32
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
; CHECK-NEXT: STRDui [[COPY1]], [[COPY]], 0 :: (store (<2 x s32>) into %ir.addr)
%0(p0) = COPY $x0
%1(<2 x s32>) = COPY $d1
G_STORE %1, %0 :: (store (<2 x s32>) into %ir.addr)
...
---
name: store_v2s64
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
- { id: 1, class: fpr }
body: |
bb.0:
liveins: $x0, $d1
; CHECK-LABEL: name: store_v2s64
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1
; CHECK-NEXT: STRQui [[COPY1]], [[COPY]], 0 :: (store (<2 x s64>) into %ir.addr, align 8)
%0(p0) = COPY $x0
%1(<2 x s64>) = COPY $q1
G_STORE %1, %0 :: (store (<2 x s64>) into %ir.addr, align 8)
...
---
name: store_4xi16
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: gpr }
machineFunctionInfo: {}
body: |
bb.1 (%ir-block.0):
liveins: $d0, $x0
; CHECK-LABEL: name: store_4xi16
; CHECK: liveins: $d0, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRDui [[COPY]], [[COPY1]], 0 :: (store (<4 x s16>) into %ir.ptr)
; CHECK-NEXT: RET_ReallyLR
%0:fpr(<4 x s16>) = COPY $d0
%1:gpr(p0) = COPY $x0
G_STORE %0(<4 x s16>), %1(p0) :: (store (<4 x s16>) into %ir.ptr)
RET_ReallyLR
...
---
name: store_4xi32
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: gpr }
machineFunctionInfo: {}
body: |
bb.1 (%ir-block.0):
liveins: $q0, $x0
; CHECK-LABEL: name: store_4xi32
; CHECK: liveins: $q0, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRQui [[COPY]], [[COPY1]], 0 :: (store (<4 x s32>) into %ir.ptr)
; CHECK-NEXT: RET_ReallyLR
%0:fpr(<4 x s32>) = COPY $q0
%1:gpr(p0) = COPY $x0
G_STORE %0(<4 x s32>), %1(p0) :: (store (<4 x s32>) into %ir.ptr)
RET_ReallyLR
...
---
name: store_8xi16
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: gpr }
machineFunctionInfo: {}
body: |
bb.1 (%ir-block.0):
liveins: $q0, $x0
; CHECK-LABEL: name: store_8xi16
; CHECK: liveins: $q0, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRQui [[COPY]], [[COPY1]], 0 :: (store (<8 x s16>) into %ir.ptr)
; CHECK-NEXT: RET_ReallyLR
%0:fpr(<8 x s16>) = COPY $q0
%1:gpr(p0) = COPY $x0
G_STORE %0(<8 x s16>), %1(p0) :: (store (<8 x s16>) into %ir.ptr)
RET_ReallyLR
...
---
name: store_16xi8
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
registers:
- { id: 0, class: fpr }
- { id: 1, class: gpr }
machineFunctionInfo: {}
body: |
bb.1 (%ir-block.0):
liveins: $q0, $x0
; CHECK-LABEL: name: store_16xi8
; CHECK: liveins: $q0, $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr128 = COPY $q0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRQui [[COPY]], [[COPY1]], 0 :: (store (<16 x s8>) into %ir.ptr)
; CHECK-NEXT: RET_ReallyLR
%0:fpr(<16 x s8>) = COPY $q0
%1:gpr(p0) = COPY $x0
G_STORE %0(<16 x s8>), %1(p0) :: (store (<16 x s8>) into %ir.ptr)
RET_ReallyLR
...
---
name: store_adrp_add_low
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_adrp_add_low
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %copy:gpr64all = COPY $x0
; CHECK-NEXT: %adrp:gpr64common = ADRP target-flags(aarch64-page) @x
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY %copy
; CHECK-NEXT: STRXui [[COPY]], %adrp, target-flags(aarch64-pageoff, aarch64-nc) @x :: (store (p0) into @x)
%copy:gpr(p0) = COPY $x0
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x
G_STORE %copy(p0), %add_low(p0) :: (store (p0) into @x)
...
---
name: store_adrp_add_low_foldable_offset
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_adrp_add_low_foldable_offset
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %copy:gpr64all = COPY $x0
; CHECK-NEXT: %adrp:gpr64common = ADRP target-flags(aarch64-page) @x + 8
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY %copy
; CHECK-NEXT: STRXui [[COPY]], %adrp, target-flags(aarch64-pageoff, aarch64-nc) @x + 8 :: (store (p0) into @x)
%copy:gpr(p0) = COPY $x0
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x + 8
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x + 8
G_STORE %copy(p0), %add_low(p0) :: (store (p0) into @x)
...
---
name: store_adrp_add_low_unfoldable_offset
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $x0
; CHECK-LABEL: name: store_adrp_add_low_unfoldable_offset
; CHECK: liveins: $x0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %copy:gpr64all = COPY $x0
; CHECK-NEXT: %add_low:gpr64common = MOVaddr target-flags(aarch64-page) @x + 3, target-flags(aarch64-pageoff, aarch64-nc) @x + 3
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY %copy
; CHECK-NEXT: STRXui [[COPY]], %add_low, 0 :: (store (p0) into @x)
%copy:gpr(p0) = COPY $x0
%adrp:gpr64(p0) = ADRP target-flags(aarch64-page) @x + 3
%add_low:gpr(p0) = G_ADD_LOW %adrp(p0), target-flags(aarch64-pageoff, aarch64-nc) @x + 3
G_STORE %copy(p0), %add_low(p0) :: (store (p0) into @x)
...
---
name: truncstores
legalized: true
regBankSelected: true
body: |
bb.0:
liveins: $x0, $w1, $x2
; CHECK-LABEL: name: truncstores
; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: %val32:gpr32 = COPY $w1
; CHECK-NEXT: %val64:gpr64 = COPY $x2
; CHECK-NEXT: STRBBui %val32, [[COPY]], 0 :: (store (s8))
; CHECK-NEXT: STRBBui %val32, [[COPY]], 43 :: (store (s8))
; CHECK-NEXT: STRHHui %val32, [[COPY]], 0 :: (store (s16))
; CHECK-NEXT: STURHHi %val32, [[COPY]], 43 :: (store (s16))
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY %val64.sub_32
; CHECK-NEXT: STRHHui [[COPY1]], [[COPY]], 0 :: (store (s16))
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY %val64.sub_32
; CHECK-NEXT: STURHHi [[COPY2]], [[COPY]], 43 :: (store (s16))
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY %val64.sub_32
; CHECK-NEXT: STRWui [[COPY3]], [[COPY]], 0 :: (store (s32))
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY %val64.sub_32
; CHECK-NEXT: STURWi [[COPY4]], [[COPY]], 43 :: (store (s32))
%0:gpr(p0) = COPY $x0
%val32:gpr(s32) = COPY $w1
%val64:gpr(s64) = COPY $x2
G_STORE %val32, %0 :: (store (s8))
; unscaled offset:
%cst:gpr(s64) = G_CONSTANT i64 43
%newptr:gpr(p0) = G_PTR_ADD %0, %cst
G_STORE %val32, %newptr :: (store (s8))
G_STORE %val32, %0 :: (store (s16))
; unscaled offset:
G_STORE %val32, %newptr :: (store (s16))
G_STORE %val64, %0 :: (store (s16))
; unscaled offset:
G_STORE %val64, %newptr :: (store (s16))
G_STORE %val64, %0 :: (store (s32))
; unscaled offset:
G_STORE %val64, %newptr :: (store (s32))
...
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