llvm/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-ext.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s
#
# Check that we can combine a G_SHUFFLE_VECTOR into a G_EXT.

...
---
name:            v8s8_cst3
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1
    ; CHECK-LABEL: name: v8s8_cst3
    ; CHECK: liveins: $d0, $d1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<8 x s8>) = COPY $d0
    ; CHECK-NEXT: %v2:_(<8 x s8>) = COPY $d1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
    ; CHECK-NEXT: %shuf:_(<8 x s8>) = G_EXT %v1, %v2, [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY %shuf(<8 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %v1:_(<8 x s8>) = COPY $d0
    %v2:_(<8 x s8>) = COPY $d1
    %shuf:_(<8 x s8>) = G_SHUFFLE_VECTOR %v1(<8 x s8>), %v2, shufflemask(3, 4, 5, 6, 7, 8, 9, 10)
    $d0 = COPY %shuf(<8 x s8>)
    RET_ReallyLR implicit $d0
...
---
name:            v8s8_cst5
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1
    ; CHECK-LABEL: name: v8s8_cst5
    ; CHECK: liveins: $d0, $d1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<8 x s8>) = COPY $d0
    ; CHECK-NEXT: %v2:_(<8 x s8>) = COPY $d1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
    ; CHECK-NEXT: %shuf:_(<8 x s8>) = G_EXT %v2, %v1, [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY %shuf(<8 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %v1:_(<8 x s8>) = COPY $d0
    %v2:_(<8 x s8>) = COPY $d1
    %shuf:_(<8 x s8>) = G_SHUFFLE_VECTOR %v1(<8 x s8>), %v2, shufflemask(13, 14, 15, 0, 1, 2, 3, 4)
    $d0 = COPY %shuf(<8 x s8>)
    RET_ReallyLR implicit $d0
...
---
name:            v16s8_cst3
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1
    ; CHECK-LABEL: name: v16s8_cst3
    ; CHECK: liveins: $q0, $q1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<16 x s8>) = COPY $q0
    ; CHECK-NEXT: %v2:_(<16 x s8>) = COPY $q1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
    ; CHECK-NEXT: %shuf:_(<16 x s8>) = G_EXT %v1, %v2, [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY %shuf(<16 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<16 x s8>) = COPY $q0
    %v2:_(<16 x s8>) = COPY $q1
    %shuf:_(<16 x s8>) = G_SHUFFLE_VECTOR %v1(<16 x s8>), %v2, shufflemask(3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
    $q0 = COPY %shuf(<16 x s8>)
    RET_ReallyLR implicit $q0
...
---
name:            v16s8_cst7
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1
    ; CHECK-LABEL: name: v16s8_cst7
    ; CHECK: liveins: $q0, $q1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<16 x s8>) = COPY $q0
    ; CHECK-NEXT: %v2:_(<16 x s8>) = COPY $q1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
    ; CHECK-NEXT: %shuf:_(<16 x s8>) = G_EXT %v2, %v1, [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY %shuf(<16 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<16 x s8>) = COPY $q0
    %v2:_(<16 x s8>) = COPY $q1
    %shuf:_(<16 x s8>) = G_SHUFFLE_VECTOR %v1(<16 x s8>), %v2, shufflemask(23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6)
    $q0 = COPY %shuf(<16 x s8>)
    RET_ReallyLR implicit $q0
...
---
name:            v4s16_cst6
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1
    ; CHECK-LABEL: name: v4s16_cst6
    ; CHECK: liveins: $d0, $d1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<4 x s16>) = COPY $d0
    ; CHECK-NEXT: %v2:_(<4 x s16>) = COPY $d1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
    ; CHECK-NEXT: %shuf:_(<4 x s16>) = G_EXT %v1, %v2, [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY %shuf(<4 x s16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %v1:_(<4 x s16>) = COPY $d0
    %v2:_(<4 x s16>) = COPY $d1
    %shuf:_(<4 x s16>) = G_SHUFFLE_VECTOR %v1(<4 x s16>), %v2, shufflemask(3, 4, 5, 6)
    $d0 = COPY %shuf(<4 x s16>)
    RET_ReallyLR implicit $d0
...
---
name:            v4s32_cst12
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1
    ; CHECK-LABEL: name: v4s32_cst12
    ; CHECK: liveins: $q0, $q1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<4 x s32>) = COPY $q0
    ; CHECK-NEXT: %v2:_(<4 x s32>) = COPY $q1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
    ; CHECK-NEXT: %shuf:_(<4 x s32>) = G_EXT %v1, %v2, [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY %shuf(<4 x s32>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<4 x s32>) = COPY $q0
    %v2:_(<4 x s32>) = COPY $q1
    %shuf:_(<4 x s32>) = G_SHUFFLE_VECTOR %v1(<4 x s32>), %v2, shufflemask(3, 4, 5, 6)
    $q0 = COPY %shuf(<4 x s32>)
    RET_ReallyLR implicit $q0
...
---
name:            undef_elts_should_match_1
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1
    ; Undef shuffle indices should not prevent matching G_EXT.
    ; We should get a constant 3 here.
    ;
    ; CHECK-LABEL: name: undef_elts_should_match_1
    ; CHECK: liveins: $d0, $d1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<8 x s8>) = COPY $d0
    ; CHECK-NEXT: %v2:_(<8 x s8>) = COPY $d1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
    ; CHECK-NEXT: %shuf:_(<8 x s8>) = G_EXT %v1, %v2, [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY %shuf(<8 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %v1:_(<8 x s8>) = COPY $d0
    %v2:_(<8 x s8>) = COPY $d1
    %shuf:_(<8 x s8>) = G_SHUFFLE_VECTOR %v1(<8 x s8>), %v2, shufflemask(3, -1, -1, 6, 7, 8, 9, 10)
    $d0 = COPY %shuf(<8 x s8>)
    RET_ReallyLR implicit $d0
...
---
name:            undef_elts_should_match_2
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $d0, $d1
    ; Undef shuffle indices should not prevent matching G_EXT.
    ; We should get a constant 6 here.
    ;
    ; CHECK-LABEL: name: undef_elts_should_match_2
    ; CHECK: liveins: $d0, $d1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<8 x s8>) = COPY $d0
    ; CHECK-NEXT: %v2:_(<8 x s8>) = COPY $d1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
    ; CHECK-NEXT: %shuf:_(<8 x s8>) = G_EXT %v2, %v1, [[C]](s32)
    ; CHECK-NEXT: $d0 = COPY %shuf(<8 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $d0
    %v1:_(<8 x s8>) = COPY $d0
    %v2:_(<8 x s8>) = COPY $d1
    %shuf:_(<8 x s8>) = G_SHUFFLE_VECTOR %v1(<8 x s8>), %v2, shufflemask(-1, -1, -1, -1, 2, 3, 4, 5)
    $d0 = COPY %shuf(<8 x s8>)
    RET_ReallyLR implicit $d0
...
---
name:            undef_elts_should_match_3
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1
    ; Undef shuffle indices should not prevent matching G_EXT.
    ; We should get a constant 7 here.
    ; CHECK-LABEL: name: undef_elts_should_match_3
    ; CHECK: liveins: $q0, $q1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<16 x s8>) = COPY $q0
    ; CHECK-NEXT: %v2:_(<16 x s8>) = COPY $q1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
    ; CHECK-NEXT: %shuf:_(<16 x s8>) = G_EXT %v2, %v1, [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY %shuf(<16 x s8>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<16 x s8>) = COPY $q0
    %v2:_(<16 x s8>) = COPY $q1
    %shuf:_(<16 x s8>) = G_SHUFFLE_VECTOR %v1(<16 x s8>), %v2, shufflemask(23, 24, 25, 26, -1, -1, 29, 30, 31, 0, 1, 2, 3, 4, -1, 6)
    $q0 = COPY %shuf(<16 x s8>)
    RET_ReallyLR implicit $q0
...
---
name:            undef_elts_should_match_4
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1
    ; Undef shuffle indices should not prevent matching G_EXT.
    ; We should get a constant 10 here.
    ; CHECK-LABEL: name: undef_elts_should_match_4
    ; CHECK: liveins: $q0, $q1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<8 x s16>) = COPY $q0
    ; CHECK-NEXT: %v2:_(<8 x s16>) = COPY $q1
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
    ; CHECK-NEXT: %shuf:_(<8 x s16>) = G_EXT %v2, %v1, [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY %shuf(<8 x s16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<8 x s16>) = COPY $q0
    %v2:_(<8 x s16>) = COPY $q1
    %shuf:_(<8 x s16>) = G_SHUFFLE_VECTOR %v1(<8 x s16>), %v2, shufflemask(-1, -1, -1, -1, 1, 2, 3, 4)
    $q0 = COPY %shuf(<8 x s16>)
    RET_ReallyLR implicit $q0
...
---
name:            all_undef
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0, $q1
    ; We expect at least one defined element in the shuffle mask.
    ;
    ; CHECK-LABEL: name: all_undef
    ; CHECK: liveins: $q0, $q1
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<8 x s16>) = COPY $q0
    ; CHECK-NEXT: %shuf:_(<8 x s16>) = G_REV64 %v1
    ; CHECK-NEXT: $q0 = COPY %shuf(<8 x s16>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<8 x s16>) = COPY $q0
    %v2:_(<8 x s16>) = COPY $q1
    %shuf:_(<8 x s16>) = G_SHUFFLE_VECTOR %v1(<8 x s16>), %v2, shufflemask(-1, -1, -1, -1, -1, -1, -1, -1)
    $q0 = COPY %shuf(<8 x s16>)
    RET_ReallyLR implicit $q0
...
---
name:            v2s64_singleton_ext
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v2s64_singleton_ext
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<2 x s64>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
    ; CHECK-NEXT: %shuf:_(<2 x s64>) = G_EXT %v1, %v1, [[C]](s32)
    ; CHECK-NEXT: $q0 = COPY %shuf(<2 x s64>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<2 x s64>) = COPY $q0
    %v2:_(<2 x s64>) = G_IMPLICIT_DEF
    %shuf:_(<2 x s64>) = G_SHUFFLE_VECTOR %v1(<2 x s64>), %v2, shufflemask(1, 0)
    $q0 = COPY %shuf(<2 x s64>)
    RET_ReallyLR implicit $q0
...
---
name:            v2s64_singleton_ext_all_undef
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v2s64_singleton_ext_all_undef
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<2 x s64>) = COPY $q0
    ; CHECK-NEXT: %v2:_(<2 x s64>) = G_IMPLICIT_DEF
    ; CHECK-NEXT: %shuf:_(<2 x s64>) = G_TRN2 %v1, %v2
    ; CHECK-NEXT: $q0 = COPY %shuf(<2 x s64>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<2 x s64>) = COPY $q0
    %v2:_(<2 x s64>) = G_IMPLICIT_DEF
    %shuf:_(<2 x s64>) = G_SHUFFLE_VECTOR %v1(<2 x s64>), %v2, shufflemask(undef, undef)
    $q0 = COPY %shuf(<2 x s64>)
    RET_ReallyLR implicit $q0
...
---
name:            v2s64_singleton_ext_same
alignment:       4
legalized:       true
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $q0
    ; CHECK-LABEL: name: v2s64_singleton_ext_same
    ; CHECK: liveins: $q0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: %v1:_(<2 x s64>) = COPY $q0
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
    ; CHECK-NEXT: %shuf:_(<2 x s64>) = G_DUPLANE64 %v1, [[C]](s64)
    ; CHECK-NEXT: $q0 = COPY %shuf(<2 x s64>)
    ; CHECK-NEXT: RET_ReallyLR implicit $q0
    %v1:_(<2 x s64>) = COPY $q0
    %v2:_(<2 x s64>) = G_IMPLICIT_DEF
    %shuf:_(<2 x s64>) = G_SHUFFLE_VECTOR %v1(<2 x s64>), %v2, shufflemask(1, 1)
    $q0 = COPY %shuf(<2 x s64>)
    RET_ReallyLR implicit $q0
...