llvm/llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt-constrain.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64-unknown-unknown -o - -verify-machineinstrs -run-pass=instruction-select %s | FileCheck %s

# When we select the G_ZEXTLOAD, the SUBREG_TO_REG will initially land on a
# gpr64sp register.
#
# This caused a test failure when selecting the G_BRJT, because it was not being
# constrained. This test checks that the G_BRJT is actually being constrained.
# As a result, the SUBREG_TO_REG should end up on a gpr64common.

...
---
name:            check_constrain
legalized:       true
regBankSelected: true
tracksRegLiveness: true
jumpTable:
  kind:            block-address
  entries:
    - id:              0
      blocks:          [ '%bb.4' ]
body:             |
  ; CHECK-LABEL: name: check_constrain
  ; CHECK: bb.0:
  ; CHECK-NEXT:   successors: %bb.3(0x40000000), %bb.1(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[DEF:%[0-9]+]]:gpr64common = IMPLICIT_DEF
  ; CHECK-NEXT:   [[LDRBBui:%[0-9]+]]:gpr32 = LDRBBui [[DEF]], 0 :: (load (s8))
  ; CHECK-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gpr64common = SUBREG_TO_REG 0, [[LDRBBui]], %subreg.sub_32
  ; CHECK-NEXT:   [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri [[SUBREG_TO_REG]], 8, 0, implicit-def $nzcv
  ; CHECK-NEXT:   Bcc 8, %bb.3, implicit $nzcv
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1:
  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.3(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   [[MOVaddrJT:%[0-9]+]]:gpr64common = MOVaddrJT target-flags(aarch64-page) %jump-table.0, target-flags(aarch64-pageoff, aarch64-nc) %jump-table.0
  ; CHECK-NEXT:   early-clobber %5:gpr64, early-clobber %6:gpr64sp = JumpTableDest32 [[MOVaddrJT]], [[SUBREG_TO_REG]], %jump-table.0
  ; CHECK-NEXT:   JUMP_TABLE_DEBUG_INFO 0
  ; CHECK-NEXT:   BR %5
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2:
  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   B %bb.3
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3:
  ; CHECK-NEXT:   RET_ReallyLR
  bb.1:
    %1:gpr(p0) = G_IMPLICIT_DEF
    %5:gpr(s64) = G_ZEXTLOAD %1(p0) :: (load (s8))
    %7:gpr(s64) = G_CONSTANT i64 8
    %16:gpr(s32) = G_ICMP intpred(ugt), %5(s64), %7
    G_BRCOND %16, %bb.4

  bb.2:
    successors: %bb.3, %bb.4

    %9:gpr(p0) = G_JUMP_TABLE %jump-table.0
    G_BRJT %9(p0), %jump-table.0, %5(s64)

  bb.3:
    G_BR %bb.4

  bb.4:
    RET_ReallyLR

...