llvm/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-cse.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - -enable-cse-in-legalizer=1 | FileCheck %s
---
name:            test_cse_in_legalizer
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: test_cse_in_legalizer
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[AND]](s32)
    ; CHECK-NEXT: $w0 = COPY [[COPY1]](s32)
    ; CHECK-NEXT: $w0 = COPY [[AND]](s32)
    %0:_(s64) = COPY $x0
    %1:_(s8) = G_TRUNC %0(s64)
    %19:_(s32) = G_ZEXT %1(s8)
    $w0 = COPY %19(s32)
    %2:_(s8) = G_TRUNC %0(s64)
    %20:_(s32) = G_ZEXT %2(s8)
    $w0 = COPY %20(s32)