# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
# REQUIRES: asserts
---
name: valid_and_eq_0_eq_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: valid_and_eq_0_eq_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %x, %y
; CHECK-NEXT: %and:_(s1) = G_ICMP intpred(eq), [[OR]](s32), %zero
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %and(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s32), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %and:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_and_eq_1_eq_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_and_eq_1_eq_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s32), %one
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s32), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %and(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%one:_(s32) = G_CONSTANT i32 1
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s32), %one:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s32), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %and:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_and_eq_0_eq_1_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_and_eq_0_eq_1_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s32), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s32), %one
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %and(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%one:_(s32) = G_CONSTANT i32 1
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s32), %one:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %and:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_and_ne_0_eq_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_and_ne_0_eq_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s32), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s32), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %and(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s32), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %and:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_and_eq_0_ne_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_and_eq_0_ne_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s32), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s32), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %and(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s32), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %and:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_and_ne_0_ne_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_and_ne_0_ne_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s32), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s32), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %and(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s32), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %and:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: valid_or_ne_0_ne_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: valid_or_ne_0_ne_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %x, %y
; CHECK-NEXT: %or:_(s1) = G_ICMP intpred(ne), [[OR]](s32), %zero
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %or(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s32), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %or:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_or_ne_1_ne_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_or_ne_1_ne_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s32), %one
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s32), %zero
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %or(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%one:_(s32) = G_CONSTANT i32 1
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s32), %one:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s32), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %or:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_or_ne_0_ne_1_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_or_ne_0_ne_1_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %one:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s32), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s32), %one
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %or(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%one:_(s32) = G_CONSTANT i32 1
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s32), %one:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %or:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_or_eq_0_ne_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_or_eq_0_ne_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s32), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s32), %zero
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %or(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s32), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %or:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: invalid_or_ne_0_eq_0_s32
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $w1
; CHECK-LABEL: name: invalid_or_ne_0_eq_0_s32
; CHECK: liveins: $w0, $w1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s32) = COPY $w1
; CHECK-NEXT: %zero:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s32), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s32), %zero
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s32) = G_ZEXT %or(s1)
; CHECK-NEXT: $w0 = COPY %zext(s32)
; CHECK-NEXT: RET_ReallyLR implicit $w0
%x:_(s32) = COPY $w0
%y:_(s32) = COPY $w1
%zero:_(s32) = G_CONSTANT i32 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s32), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s32), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s32) = G_ZEXT %or:_(s1)
$w0 = COPY %zext
RET_ReallyLR implicit $w0
...
---
name: valid_and_eq_0_eq_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: valid_and_eq_0_eq_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %x, %y
; CHECK-NEXT: %and:_(s1) = G_ICMP intpred(eq), [[OR]](s64), %zero
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s64), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_eq_1_eq_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_eq_1_eq_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %one:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s64), %one
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s64), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%one:_(s64) = G_CONSTANT i64 1
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s64), %one:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s64), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_eq_0_eq_1_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_eq_0_eq_1_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %one:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s64), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s64), %one
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%one:_(s64) = G_CONSTANT i64 1
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s64), %one:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_ne_0_eq_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_ne_0_eq_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s64), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s64), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s64), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_eq_0_ne_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_eq_0_ne_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s64), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s64), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s64), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_ne_0_ne_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_ne_0_ne_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s64), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s64), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s64), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: valid_or_ne_0_ne_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: valid_or_ne_0_ne_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %x, %y
; CHECK-NEXT: %or:_(s1) = G_ICMP intpred(ne), [[OR]](s64), %zero
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %or(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s64), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %or:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_ne_1_ne_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_ne_1_ne_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %one:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s64), %one
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s64), %zero
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %or(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%one:_(s64) = G_CONSTANT i64 1
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s64), %one:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s64), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %or:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_ne_0_ne_1_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_ne_0_ne_1_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %one:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s64), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s64), %one
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %or(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%one:_(s64) = G_CONSTANT i64 1
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s64), %one:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %or:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_eq_0_ne_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_eq_0_ne_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s64), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(ne), %y(s64), %zero
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %or(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(ne), %y:_(s64), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %or:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_ne_0_eq_0_s64
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_ne_0_eq_0_s64
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s64) = COPY $x0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(ne), %x(s64), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s64), %zero
; CHECK-NEXT: %or:_(s1) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %or(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s64) = COPY $x0
%y:_(s64) = COPY $x1
%zero:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(ne), %x:_(s64), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s64), %zero:_
%or:_(s1) = G_OR %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %or:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: valid_and_eq_0_eq_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: valid_and_eq_0_eq_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR %x, %y
; CHECK-NEXT: %and:_(<2 x s1>) = G_ICMP intpred(eq), [[OR]](<2 x s32>), %zero
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_eq_non_0_eq_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_eq_non_0_eq_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %scalar0:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %scalar1:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
; CHECK-NEXT: %non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x(<2 x s32>), %non_zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%scalar0:_(s32) = G_CONSTANT i32 0
%scalar1:_(s32) = G_CONSTANT i32 1
%zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
%non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x s32>), %non_zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_eq_0_eq_non_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_eq_0_eq_non_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %scalar0:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %scalar1:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
; CHECK-NEXT: %non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y(<2 x s32>), %non_zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%scalar0:_(s32) = G_CONSTANT i32 0
%scalar1:_(s32) = G_CONSTANT i32 1
%zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
%non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x s32>), %non_zero:_
%and:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_ne_0_eq_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_ne_0_eq_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_eq_0_ne_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_eq_0_ne_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_and_ne_0_ne_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_and_ne_0_ne_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: valid_or_ne_0_ne_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: valid_or_ne_0_ne_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(<2 x s32>) = G_OR %x, %y
; CHECK-NEXT: %and:_(<2 x s1>) = G_ICMP intpred(ne), [[OR]](<2 x s32>), %zero
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_OR %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_ne_non_0_ne_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_ne_non_0_ne_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %scalar0:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %scalar1:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
; CHECK-NEXT: %non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x(<2 x s32>), %non_zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%scalar0:_(s32) = G_CONSTANT i32 0
%scalar1:_(s32) = G_CONSTANT i32 1
%zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
%non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x:_(<2 x s32>), %non_zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_OR %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_ne_0_ne_non_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_ne_0_ne_non_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %scalar0:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %scalar1:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
; CHECK-NEXT: %non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y(<2 x s32>), %non_zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%scalar0:_(s32) = G_CONSTANT i32 0
%scalar1:_(s32) = G_CONSTANT i32 1
%zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar0(s32)
%non_zero:_(<2 x s32>) = G_BUILD_VECTOR %scalar0(s32), %scalar1(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y:_(<2 x s32>), %non_zero:_
%and:_(<2 x s1>) = G_OR %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_eq_0_ne_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_eq_0_ne_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(ne), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_OR %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_ne_0_eq_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_ne_0_eq_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(ne), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_OR %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_or_eq_0_eq_0_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_or_eq_0_eq_0_vec
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $x1
; CHECK-NEXT: %zero_scalar:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x(<2 x s32>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y(<2 x s32>), %zero
; CHECK-NEXT: %and:_(<2 x s1>) = G_OR %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %and(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s32>) = COPY $x1
%zero_scalar:_(s32) = G_CONSTANT i32 0
%zero:_(<2 x s32>) = G_BUILD_VECTOR %zero_scalar(s32), %zero_scalar(s32)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x s32>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x s32>), %zero:_
%and:_(<2 x s1>) = G_OR %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %and:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_p0_src
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $x1
; CHECK-LABEL: name: invalid_p0_src
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(p0) = COPY $x0
; CHECK-NEXT: %y:_(p0) = COPY $x1
; CHECK-NEXT: %zero:_(p0) = G_CONSTANT i64 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(p0), %zero
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(p0), %zero
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(p0) = COPY $x0
%y:_(p0) = COPY $x1
%zero:_(p0) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(p0), %zero:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(p0), %zero:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_p0_src_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $q0, $q1
; CHECK-LABEL: name: invalid_p0_src_vec
; CHECK: liveins: $q0, $q1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x p0>) = COPY $q0
; CHECK-NEXT: %y:_(<2 x p0>) = COPY $q1
; CHECK-NEXT: %scalar0:_(p0) = G_CONSTANT i64 0
; CHECK-NEXT: %zero:_(<2 x p0>) = G_BUILD_VECTOR %scalar0(p0), %scalar0(p0)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x(<2 x p0>), %zero
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y(<2 x p0>), %zero
; CHECK-NEXT: %or:_(<2 x s1>) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s64>) = G_ZEXT %or(<2 x s1>)
; CHECK-NEXT: $q0 = COPY %zext(<2 x s64>)
; CHECK-NEXT: RET_ReallyLR implicit $q0
%x:_(<2 x p0>) = COPY $q0
%y:_(<2 x p0>) = COPY $q1
%scalar0:_(p0) = G_CONSTANT i64 0
%zero:_(<2 x p0>) = G_BUILD_VECTOR %scalar0(p0), %scalar0(p0)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x p0>), %zero:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x p0>), %zero:_
%or:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s64>) = G_ZEXT %or:_(<2 x s1>)
$q0 = COPY %zext
RET_ReallyLR implicit $q0
...
---
name: invalid_diff_src_ty
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $w0, $x1
; CHECK-LABEL: name: invalid_diff_src_ty
; CHECK: liveins: $w0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(s32) = COPY $w0
; CHECK-NEXT: %y:_(s64) = COPY $x1
; CHECK-NEXT: %zero_s32:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %zero_s64:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %cmp1:_(s1) = G_ICMP intpred(eq), %x(s32), %zero_s32
; CHECK-NEXT: %cmp2:_(s1) = G_ICMP intpred(eq), %y(s64), %zero_s64
; CHECK-NEXT: %and:_(s1) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(s64) = G_ZEXT %and(s1)
; CHECK-NEXT: $x0 = COPY %zext(s64)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(s32) = COPY $w0
%y:_(s64) = COPY $x1
%zero_s32:_(s32) = G_CONSTANT i32 0
%zero_s64:_(s64) = G_CONSTANT i64 0
%cmp1:_(s1) = G_ICMP intpred(eq), %x:_(s32), %zero_s32:_
%cmp2:_(s1) = G_ICMP intpred(eq), %y:_(s64), %zero_s64:_
%and:_(s1) = G_AND %cmp1, %cmp2
%zext:_(s64) = G_ZEXT %and:_(s1)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
---
name: invalid_diff_src_ty_vec
tracksRegLiveness: true
legalized: true
body: |
bb.0:
liveins: $x0, $q1
; CHECK-LABEL: name: invalid_diff_src_ty_vec
; CHECK: liveins: $x0, $q1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %x:_(<2 x s32>) = COPY $x0
; CHECK-NEXT: %y:_(<2 x s64>) = COPY $q1
; CHECK-NEXT: %scalar0s32:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: %scalar0s64:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: %zero_s32:_(<2 x s32>) = G_BUILD_VECTOR %scalar0s32(s32), %scalar0s32(s32)
; CHECK-NEXT: %zero_s64:_(<2 x s64>) = G_BUILD_VECTOR %scalar0s64(s64), %scalar0s64(s64)
; CHECK-NEXT: %cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x(<2 x s32>), %zero_s32
; CHECK-NEXT: %cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y(<2 x s64>), %zero_s64
; CHECK-NEXT: %or:_(<2 x s1>) = G_AND %cmp1, %cmp2
; CHECK-NEXT: %zext:_(<2 x s32>) = G_ZEXT %or(<2 x s1>)
; CHECK-NEXT: $x0 = COPY %zext(<2 x s32>)
; CHECK-NEXT: RET_ReallyLR implicit $x0
%x:_(<2 x s32>) = COPY $x0
%y:_(<2 x s64>) = COPY $q1
%scalar0s32:_(s32) = G_CONSTANT i32 0
%scalar0s64:_(s64) = G_CONSTANT i64 0
%zero_s32:_(<2 x s32>) = G_BUILD_VECTOR %scalar0s32(s32), %scalar0s32(s32)
%zero_s64:_(<2 x s64>) = G_BUILD_VECTOR %scalar0s64(s64), %scalar0s64(s64)
%cmp1:_(<2 x s1>) = G_ICMP intpred(eq), %x:_(<2 x s32>), %zero_s32:_
%cmp2:_(<2 x s1>) = G_ICMP intpred(eq), %y:_(<2 x s64>), %zero_s64:_
%or:_(<2 x s1>) = G_AND %cmp1, %cmp2
%zext:_(<2 x s32>) = G_ZEXT %or:_(<2 x s1>)
$x0 = COPY %zext
RET_ReallyLR implicit $x0
...
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