form-bitfield-extract-from-shr.mir | Explore in Territory

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s

# Check that we can fold a G_ASHR/G_LSHR fed by a G_SHL into a G_SBFX/G_UBFX.

---
name:            apply_ashr_shl_to_sbfx
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: apply_ashr_shl_to_sbfx
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
    ; CHECK: [[SBFX:%[0-9]+]]:_(s32) = G_SBFX [[COPY]], [[C1]](s32), [[C]]
    ; CHECK: $w0 = COPY [[SBFX]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 5
    %2:_(s32) = G_CONSTANT i32 16
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_ASHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            apply_ashr_shl_to_sbfx_lower_bound
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: apply_ashr_shl_to_sbfx_lower_bound
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK: [[SBFX:%[0-9]+]]:_(s32) = G_SBFX [[COPY]], [[C]](s32), [[C]]
    ; CHECK: $w0 = COPY [[SBFX]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 30
    %2:_(s32) = G_CONSTANT i32 31
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_ASHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            apply_ashr_shl_to_sbfx_upper_bound
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: apply_ashr_shl_to_sbfx_upper_bound
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 30
    ; CHECK: [[SBFX:%[0-9]+]]:_(s32) = G_SBFX [[COPY]], [[C1]](s32), [[C]]
    ; CHECK: $w0 = COPY [[SBFX]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_CONSTANT i32 31
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_ASHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            apply_lshr_shl_to_ubfx
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: apply_lshr_shl_to_ubfx
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
    ; CHECK: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C1]](s32), [[C]]
    ; CHECK: $w0 = COPY [[UBFX]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 5
    %2:_(s32) = G_CONSTANT i32 16
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_LSHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            apply_lshr_shl_to_ubfx_lower_bound
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: apply_lshr_shl_to_ubfx_lower_bound
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C]](s32), [[C]]
    ; CHECK: $w0 = COPY [[UBFX]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 30
    %2:_(s32) = G_CONSTANT i32 31
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_LSHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            apply_lshr_shl_to_ubfx_upper_bound
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: apply_lshr_shl_to_ubfx_upper_bound
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 30
    ; CHECK: [[UBFX:%[0-9]+]]:_(s32) = G_UBFX [[COPY]], [[C1]](s32), [[C]]
    ; CHECK: $w0 = COPY [[UBFX]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 1
    %2:_(s32) = G_CONSTANT i32 31
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_LSHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            dont_apply_pos_out_of_bounds
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: dont_apply_pos_out_of_bounds
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
    ; CHECK: $w0 = COPY [[ASHR]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 5
    %2:_(s32) = G_CONSTANT i32 2
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_ASHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            dont_apply_no_constant
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: dont_apply_no_constant
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]](s32)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
    ; CHECK: $w0 = COPY [[ASHR]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = COPY $w1
    %2:_(s32) = G_CONSTANT i32 2
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_ASHR %3, %2
    $w0 = COPY %4(s32)
...

---
name:            dont_apply_more_than_one_use
legalized: true
body:             |
  bb.0.entry:
    ; CHECK-LABEL: name: dont_apply_more_than_one_use
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
    ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)
    ; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[SHL]], [[ASHR]]
    ; CHECK: $w0 = COPY [[MUL]](s32)
    %0:_(s32) = COPY $w0
    %1:_(s32) = G_CONSTANT i32 5
    %2:_(s32) = G_CONSTANT i32 16
    %3:_(s32) = G_SHL %0, %1
    %4:_(s32) = G_ASHR %3, %2
    %5:_(s32) = G_MUL %3, %4
    $w0 = COPY %5(s32)
...
llvm/llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-shr.mir
