llvm/llvm/test/CodeGen/AArch64/sve-pfalse-machine-cse.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=machine-cse -mtriple=aarch64 -mattr=+sve -o - %s | FileCheck %s
---
name:            pfalse
tracksRegLiveness: true
body:             |
  bb.0:
    liveins: $p0

    ; CHECK-LABEL: name: pfalse
    ; CHECK: liveins: $p0
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:ppr = COPY $p0
    ; CHECK-NEXT: [[PFALSE:%[0-9]+]]:ppr = PFALSE implicit $vg
    ; CHECK-NEXT: [[UZP1_PPP_B:%[0-9]+]]:ppr = UZP1_PPP_B [[COPY]], [[PFALSE]]
    ; CHECK-NEXT: [[UZP1_PPP_B1:%[0-9]+]]:ppr = UZP1_PPP_B killed [[UZP1_PPP_B]], [[PFALSE]]
    ; CHECK-NEXT: $p0 = COPY [[UZP1_PPP_B1]]
    ; CHECK-NEXT: RET_ReallyLR implicit $p0
    %0:ppr = COPY $p0
    %2:ppr = PFALSE implicit $vg
    %3:ppr = UZP1_PPP_B %0, %2
    %4:ppr = PFALSE implicit $vg
    %5:ppr = UZP1_PPP_B killed %3, %4
    $p0 = COPY %5
    RET_ReallyLR implicit $p0
...