llvm/llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+sve,+f32mm < %s -o - | FileCheck %s

define <vscale x 4 x float> @fmmla_s(<vscale x 4 x float> %r, <vscale x 4 x float> %a, <vscale x 4 x float> %b) nounwind {
; CHECK-LABEL: fmmla_s:
; CHECK:       // %bb.0: // %entry
; CHECK-NEXT:    fmmla z0.s, z1.s, z2.s
; CHECK-NEXT:    ret
entry:
  %val = tail call <vscale x 4 x float> @llvm.aarch64.sve.fmmla.nxv4f32(<vscale x 4 x float> %r, <vscale x 4 x float> %a, <vscale x 4 x float> %b)
  ret <vscale x 4 x float> %val
}

declare <vscale x 4 x float> @llvm.aarch64.sve.fmmla.nxv4f32(<vscale x 4 x float>,<vscale x 4 x float>,<vscale x 4 x float>)