llvm/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir

# RUN: llc -mtriple=amdgcn -run-pass none -o - %s | FileCheck %s
...
---

# CHECK-LABEL: name: spill_slot_stack_id
# CHECK: {{^}}fixedStack:
# CHECK: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: default,
# CHECK: - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: default,
# CHECK: - { id: 2, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: noalloc,

# CHECK: {{^}}stack:
# CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 16,
# CHECK-NEXT: stack-id: noalloc,

# CHECK: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8,
# CHECK-NEXT: stack-id: default,

# CHECK: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4,
# CHECK-NEXT: stack-id: default,


name: spill_slot_stack_id
fixedStack:
  - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: noalloc }
  - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: default }
  - { id: 2, type: spill-slot, offset: 0, size: 4, alignment: 4 }
stack:
  - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: noalloc }
  - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: default }
  - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }

body: |
  bb.0:
    S_ENDPGM 0
...