llvm/llvm/test/CodeGen/AVR/pseudo/ADCWRdRr.mir

# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s

# This test checks the expansion of the 16-bit add with carry pseudo instruction.

--- |
  target triple = "avr--"
  define void @test_adcwrdrr() {
  entry:
    ret void
  }
...

---
name:            test_adcwrdrr
body: |
  bb.0.entry:
    liveins: $r15r14, $r21r20, $sreg

    ; CHECK-LABEL: test_adcwrdrr

    ; CHECK:       $r14 = ADCRdRr $r14, $r20, implicit-def $sreg, implicit $sreg
    ; CHECK-LABEL: $r15 = ADCRdRr $r15, $r21, implicit-def $sreg, implicit killed $sreg

    $r15r14 = ADCWRdRr $r15r14, $r21r20, implicit-def $sreg, implicit $sreg
...