llvm/llvm/test/CodeGen/AVR/pseudo/EORWRdRr.mir

# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s

# This test checks the expansion of the 16-bit EOR pseudo instruction.

--- |
  target triple = "avr--"
  define void @test_eorwrdrr() {
  entry:
    ret void
  }
...

---
name:            test_eorwrdrr
body: |
  bb.0.entry:
    liveins: $r15r14, $r21r20

    ; CHECK-LABEL: test_eorwrdrr

    ; CHECK:      $r14 = EORRdRr $r14, $r20, implicit-def dead $sreg
    ; CHECK-NEXT: $r15 = EORRdRr $r15, $r21, implicit-def $sreg

    $r15r14 = EORWRdRr $r15r14, $r21r20, implicit-def $sreg
...