; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s
declare <8 x float> @llvm.loongarch.lasx.xvfmsub.s(<8 x float>, <8 x float>, <8 x float>)
define <8 x float> @lasx_xvfmsub_s(<8 x float> %va, <8 x float> %vb, <8 x float> %vc) nounwind {
; CHECK-LABEL: lasx_xvfmsub_s:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvfmsub.s $xr0, $xr0, $xr1, $xr2
; CHECK-NEXT: ret
entry:
%res = call <8 x float> @llvm.loongarch.lasx.xvfmsub.s(<8 x float> %va, <8 x float> %vb, <8 x float> %vc)
ret <8 x float> %res
}
declare <4 x double> @llvm.loongarch.lasx.xvfmsub.d(<4 x double>, <4 x double>, <4 x double>)
define <4 x double> @lasx_xvfmsub_d(<4 x double> %va, <4 x double> %vb, <4 x double> %vc) nounwind {
; CHECK-LABEL: lasx_xvfmsub_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvfmsub.d $xr0, $xr0, $xr1, $xr2
; CHECK-NEXT: ret
entry:
%res = call <4 x double> @llvm.loongarch.lasx.xvfmsub.d(<4 x double> %va, <4 x double> %vb, <4 x double> %vc)
ret <4 x double> %res
}