llvm/llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldi.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare <4 x i64> @llvm.loongarch.lasx.xvldi(i32)

define <4 x i64> @lasx_xvldi() nounwind {
; CHECK-LABEL: lasx_xvldi:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvldi $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <4 x i64> @llvm.loongarch.lasx.xvldi(i32 1)
  ret <4 x i64> %res
}

declare <32 x i8> @llvm.loongarch.lasx.xvrepli.b(i32)

define <32 x i8> @lasx_xvrepli_b() nounwind {
; CHECK-LABEL: lasx_xvrepli_b:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.b $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <32 x i8> @llvm.loongarch.lasx.xvrepli.b(i32 1)
  ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvrepli.h(i32)

define <16 x i16> @lasx_xvrepli_h() nounwind {
; CHECK-LABEL: lasx_xvrepli_h:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.h $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <16 x i16> @llvm.loongarch.lasx.xvrepli.h(i32 1)
  ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvrepli.w(i32)

define <8 x i32> @lasx_xvrepli_w() nounwind {
; CHECK-LABEL: lasx_xvrepli_w:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.w $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <8 x i32> @llvm.loongarch.lasx.xvrepli.w(i32 1)
  ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvrepli.d(i32)

define <4 x i64> @lasx_xvrepli_d() nounwind {
; CHECK-LABEL: lasx_xvrepli_d:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvrepli.d $xr0, 1
; CHECK-NEXT:    ret
entry:
  %res = call <4 x i64> @llvm.loongarch.lasx.xvrepli.d(i32 1)
  ret <4 x i64> %res
}