; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
declare <2 x i64> @llvm.loongarch.lsx.vldi(i32)
define <2 x i64> @lsx_vldi() nounwind {
; CHECK-LABEL: lsx_vldi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vldi $vr0, 4095
; CHECK-NEXT: ret
entry:
%res = call <2 x i64> @llvm.loongarch.lsx.vldi(i32 4095)
ret <2 x i64> %res
}
declare <16 x i8> @llvm.loongarch.lsx.vrepli.b(i32)
define <16 x i8> @lsx_vrepli_b() nounwind {
; CHECK-LABEL: lsx_vrepli_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vrepli.b $vr0, 511
; CHECK-NEXT: ret
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vrepli.b(i32 511)
ret <16 x i8> %res
}
declare <8 x i16> @llvm.loongarch.lsx.vrepli.h(i32)
define <8 x i16> @lsx_vrepli_h() nounwind {
; CHECK-LABEL: lsx_vrepli_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vrepli.h $vr0, 511
; CHECK-NEXT: ret
entry:
%res = call <8 x i16> @llvm.loongarch.lsx.vrepli.h(i32 511)
ret <8 x i16> %res
}
declare <4 x i32> @llvm.loongarch.lsx.vrepli.w(i32)
define <4 x i32> @lsx_vrepli_w() nounwind {
; CHECK-LABEL: lsx_vrepli_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vrepli.w $vr0, 511
; CHECK-NEXT: ret
entry:
%res = call <4 x i32> @llvm.loongarch.lsx.vrepli.w(i32 511)
ret <4 x i32> %res
}
declare <2 x i64> @llvm.loongarch.lsx.vrepli.d(i32)
define <2 x i64> @lsx_vrepli_d() nounwind {
; CHECK-LABEL: lsx_vrepli_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vrepli.d $vr0, 511
; CHECK-NEXT: ret
entry:
%res = call <2 x i64> @llvm.loongarch.lsx.vrepli.d(i32 511)
ret <2 x i64> %res
}