llvm/llvm/test/CodeGen/RISCV/rvv/vle_vid-vfcvt.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s

define void @foo_1(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_1:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lui a1, %hi(.LCPI0_0)
; CHECK-NEXT:    addi a1, a1, %lo(.LCPI0_0)
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vle32.v v8, (a1)
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float -2147483648.0, float -2147483520.0, float -2147483392.0, float -2147483264.0>, ptr %t, align 16
  ret void
}

define void @foo_2(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lui a1, %hi(.LCPI1_0)
; CHECK-NEXT:    addi a1, a1, %lo(.LCPI1_0)
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vle32.v v8, (a1)
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float 2147483136.0, float 2147483264.0, float 2147483392.0, float 2147483520.0>, ptr %t, align 16
  ret void
}

define void @foo_3(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_3:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vid.v v8
; CHECK-NEXT:    vadd.vi v8, v8, -1
; CHECK-NEXT:    vfcvt.f.x.v v8, v8
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float -1.0, float 0.0, float 1.0, float 2.0>, ptr %t, align 16
  ret void
}

define void @foo_4(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_4:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vid.v v8
; CHECK-NEXT:    vsll.vi v8, v8, 10
; CHECK-NEXT:    vadd.vi v8, v8, -16
; CHECK-NEXT:    vfcvt.f.x.v v8, v8
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float -16.0, float 1008.0, float 2032.0, float 3056.0>, ptr %t, align 16
  ret void
}

define void @foo_5(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_5:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vid.v v8
; CHECK-NEXT:    vfcvt.f.x.v v8, v8
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float 0.0, float 1.0, float 2.0, float 3.0>, ptr %t, align 16
  ret void
}

define void @foo_6(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_6:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lui a1, %hi(.LCPI5_0)
; CHECK-NEXT:    addi a1, a1, %lo(.LCPI5_0)
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vle32.v v8, (a1)
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float -0.0, float 1.0, float 2.0, float 3.0>, ptr %t, align 16
  ret void
}

define void @foo_7(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_7:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lui a1, %hi(.LCPI6_0)
; CHECK-NEXT:    addi a1, a1, %lo(.LCPI6_0)
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vle32.v v8, (a1)
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float -3.0, float -2.0, float -1.0, float -0.0>, ptr %t, align 16
  ret void
}

define void @foo_8(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_8:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lui a1, %hi(.LCPI7_0)
; CHECK-NEXT:    addi a1, a1, %lo(.LCPI7_0)
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vle32.v v8, (a1)
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float 1.5, float 2.5, float 3.5, float 4.5>, ptr %t, align 16
  ret void
}

; Make sure we don't try to use vid+vsll+vfcvt. We previously flipped the sign
; of 2147483648.0.
define void @foo_9(ptr nocapture noundef writeonly %t) {
; CHECK-LABEL: foo_9:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lui a1, %hi(.LCPI8_0)
; CHECK-NEXT:    addi a1, a1, %lo(.LCPI8_0)
; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, ma
; CHECK-NEXT:    vle32.v v8, (a1)
; CHECK-NEXT:    vse32.v v8, (a0)
; CHECK-NEXT:    ret
entry:
  store <4 x float> <float 0.0, float -2147483648.0, float 0.0, float 2147483648.0>, ptr %t, align 16
  ret void
}