llvm/llvm/test/CodeGen/PowerPC/ppc-crbits-onoff.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
; RUN: llc -ppc-gpr-icmps=all -verify-machineinstrs -mcpu=pwr7 -mattr=-isel < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu"

; Function Attrs: nounwind readnone
define signext i32 @crbitsoff(i32 signext %v1, i32 signext %v2) #0 {
; CHECK-LABEL: crbitsoff:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    cntlzw 4, 4
; CHECK-NEXT:    cmplwi 3, 0
; CHECK-NEXT:    li 3, 1
; CHECK-NEXT:    iseleq 3, 0, 3
; CHECK-NEXT:    rlwinm 4, 4, 27, 5, 31
; CHECK-NEXT:    and 3, 3, 4
; CHECK-NEXT:    blr
;
; CHECK-NO-ISEL-LABEL: crbitsoff:
; CHECK-NO-ISEL:       # %bb.0: # %entry
; CHECK-NO-ISEL-NEXT:    cmplwi 3, 0
; CHECK-NO-ISEL-NEXT:    li 3, 1
; CHECK-NO-ISEL-NEXT:    bne 0, .LBB0_2
; CHECK-NO-ISEL-NEXT:  # %bb.1: # %entry
; CHECK-NO-ISEL-NEXT:    li 3, 0
; CHECK-NO-ISEL-NEXT:  .LBB0_2: # %entry
; CHECK-NO-ISEL-NEXT:    cntlzw 4, 4
; CHECK-NO-ISEL-NEXT:    rlwinm 4, 4, 27, 5, 31
; CHECK-NO-ISEL-NEXT:    and 3, 3, 4
; CHECK-NO-ISEL-NEXT:    blr
entry:
  %tobool = icmp ne i32 %v1, 0
  %lnot = icmp eq i32 %v2, 0
  %and3 = and i1 %tobool, %lnot
  %and = zext i1 %and3 to i32
  ret i32 %and

}

define signext i32 @crbitson(i32 signext %v1, i32 signext %v2) #1 {
; CHECK-LABEL: crbitson:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    cntlzw 3, 3
; CHECK-NEXT:    cntlzw 4, 4
; CHECK-NEXT:    srwi 3, 3, 5
; CHECK-NEXT:    srwi 4, 4, 5
; CHECK-NEXT:    xori 3, 3, 1
; CHECK-NEXT:    and 3, 3, 4
; CHECK-NEXT:    blr
;
; CHECK-NO-ISEL-LABEL: crbitson:
; CHECK-NO-ISEL:       # %bb.0: # %entry
; CHECK-NO-ISEL-NEXT:    cntlzw 3, 3
; CHECK-NO-ISEL-NEXT:    cntlzw 4, 4
; CHECK-NO-ISEL-NEXT:    srwi 3, 3, 5
; CHECK-NO-ISEL-NEXT:    srwi 4, 4, 5
; CHECK-NO-ISEL-NEXT:    xori 3, 3, 1
; CHECK-NO-ISEL-NEXT:    and 3, 3, 4
; CHECK-NO-ISEL-NEXT:    blr
entry:
  %tobool = icmp ne i32 %v1, 0
  %lnot = icmp eq i32 %v2, 0
  %and3 = and i1 %tobool, %lnot
  %and = zext i1 %and3 to i32
  ret i32 %and

}


attributes #0 = { nounwind readnone "target-features"="-crbits" }
attributes #1 = { nounwind readnone }