; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s
%struct.poly2 = type { [11 x i64] }
; Function Attrs: nofree norecurse nounwind
define dso_local void @poly2_lshift1(ptr nocapture %p) local_unnamed_addr #0 {
; CHECK-LABEL: poly2_lshift1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r4, 72
; CHECK-NEXT: addis r6, r2, .LCPI0_1@toc@ha
; CHECK-NEXT: ld r5, 64(r3)
; CHECK-NEXT: lxvd2x vs0, r3, r4
; CHECK-NEXT: addi r6, r6, .LCPI0_1@toc@l
; CHECK-NEXT: lxvd2x v4, 0, r6
; CHECK-NEXT: addis r6, r2, .LCPI0_0@toc@ha
; CHECK-NEXT: addi r6, r6, .LCPI0_0@toc@l
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: mtfprd f0, r5
; CHECK-NEXT: xxpermdi v3, v2, vs0, 2
; CHECK-NEXT: vsld v2, v2, v4
; CHECK-NEXT: lxvd2x v4, 0, r6
; CHECK-NEXT: ld r6, 0(r3)
; CHECK-NEXT: sldi r7, r6, 1
; CHECK-NEXT: rotldi r6, r6, 1
; CHECK-NEXT: std r7, 0(r3)
; CHECK-NEXT: ld r7, 8(r3)
; CHECK-NEXT: vsrd v3, v3, v4
; CHECK-NEXT: xxlor vs0, v2, v3
; CHECK-NEXT: rldimi r6, r7, 1, 0
; CHECK-NEXT: rotldi r7, r7, 1
; CHECK-NEXT: std r6, 8(r3)
; CHECK-NEXT: ld r6, 16(r3)
; CHECK-NEXT: rldimi r7, r6, 1, 0
; CHECK-NEXT: rotldi r6, r6, 1
; CHECK-NEXT: std r7, 16(r3)
; CHECK-NEXT: ld r7, 24(r3)
; CHECK-NEXT: rldimi r6, r7, 1, 0
; CHECK-NEXT: rotldi r7, r7, 1
; CHECK-NEXT: std r6, 24(r3)
; CHECK-NEXT: ld r6, 32(r3)
; CHECK-NEXT: rldimi r7, r6, 1, 0
; CHECK-NEXT: rotldi r6, r6, 1
; CHECK-NEXT: std r7, 32(r3)
; CHECK-NEXT: ld r7, 40(r3)
; CHECK-NEXT: rldimi r6, r7, 1, 0
; CHECK-NEXT: rotldi r7, r7, 1
; CHECK-NEXT: std r6, 40(r3)
; CHECK-NEXT: ld r6, 48(r3)
; CHECK-NEXT: rldimi r7, r6, 1, 0
; CHECK-NEXT: rotldi r6, r6, 1
; CHECK-NEXT: std r7, 48(r3)
; CHECK-NEXT: ld r7, 56(r3)
; CHECK-NEXT: rldimi r6, r7, 1, 0
; CHECK-NEXT: std r6, 56(r3)
; CHECK-NEXT: rotldi r6, r7, 1
; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: rldimi r6, r5, 1, 0
; CHECK-NEXT: std r6, 64(r3)
; CHECK-NEXT: stxvd2x vs0, r3, r4
; CHECK-NEXT: blr
entry:
%0 = load i64, ptr %p, align 8
%shl = shl i64 %0, 1
store i64 %shl, ptr %p, align 8
%arrayidx.1 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 1
%1 = load i64, ptr %arrayidx.1, align 8
%or.1 = call i64 @llvm.fshl.i64(i64 %1, i64 %0, i64 1)
store i64 %or.1, ptr %arrayidx.1, align 8
%arrayidx.2 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 2
%2 = load i64, ptr %arrayidx.2, align 8
%or.2 = call i64 @llvm.fshl.i64(i64 %2, i64 %1, i64 1)
store i64 %or.2, ptr %arrayidx.2, align 8
%arrayidx.3 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 3
%3 = load i64, ptr %arrayidx.3, align 8
%or.3 = call i64 @llvm.fshl.i64(i64 %3, i64 %2, i64 1)
store i64 %or.3, ptr %arrayidx.3, align 8
%arrayidx.4 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 4
%4 = load i64, ptr %arrayidx.4, align 8
%or.4 = call i64 @llvm.fshl.i64(i64 %4, i64 %3, i64 1)
store i64 %or.4, ptr %arrayidx.4, align 8
%arrayidx.5 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 5
%5 = load i64, ptr %arrayidx.5, align 8
%or.5 = call i64 @llvm.fshl.i64(i64 %5, i64 %4, i64 1)
store i64 %or.5, ptr %arrayidx.5, align 8
%arrayidx.6 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 6
%6 = load i64, ptr %arrayidx.6, align 8
%or.6 = call i64 @llvm.fshl.i64(i64 %6, i64 %5, i64 1)
store i64 %or.6, ptr %arrayidx.6, align 8
%arrayidx.7 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 7
%7 = load i64, ptr %arrayidx.7, align 8
%or.7 = call i64 @llvm.fshl.i64(i64 %7, i64 %6, i64 1)
store i64 %or.7, ptr %arrayidx.7, align 8
%arrayidx.8 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 8
%8 = load i64, ptr %arrayidx.8, align 8
%or.8 = call i64 @llvm.fshl.i64(i64 %8, i64 %7, i64 1)
store i64 %or.8, ptr %arrayidx.8, align 8
%arrayidx.9 = getelementptr inbounds %struct.poly2, ptr %p, i64 0, i32 0, i64 9
%9 = load <2 x i64>, ptr %arrayidx.9, align 8
%10 = insertelement <2 x i64> undef, i64 %8, i32 0
%11 = shufflevector <2 x i64> %10, <2 x i64> %9, <2 x i32> <i32 0, i32 2>
%12 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %9, <2 x i64> %11, <2 x i64> <i64 1, i64 1>)
store <2 x i64> %12, ptr %arrayidx.9, align 8
ret void
}
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare i64 @llvm.fshl.i64(i64, i64, i64) #1
; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare <2 x i64> @llvm.fshl.v2i64(<2 x i64>, <2 x i64>, <2 x i64>) #1
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