llvm/llvm/test/CodeGen/PowerPC/lbz-from-ld-shift.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -mtriple=powerpc64--   < %s | FileCheck %s --check-prefixes=BE
; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs -mtriple=powerpc64le-- < %s | FileCheck %s --check-prefixes=LE

define signext i32 @test(ptr nocapture readonly %P) nounwind {
; BE-LABEL: test:
; BE:       # %bb.0:
; BE-NEXT:    lbz r3, 0(r3)
; BE-NEXT:    blr
;
; LE-LABEL: test:
; LE:       # %bb.0:
; LE-NEXT:    lbz r3, 3(r3)
; LE-NEXT:    blr
  %t0 = load i32, ptr %P, align 4
  %shr = lshr i32 %t0, 24
  ret i32 %shr
}