; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc %s -o - -enable-shrink-wrap=true -no-x86-call-frame-opt | FileCheck %s --check-prefix=ENABLE
; RUN: llc %s -o - -enable-shrink-wrap=false -no-x86-call-frame-opt | FileCheck %s --check-prefix=DISABLE
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-apple-macosx10.5"
@a = common global i32 0, align 4
@d = internal unnamed_addr global i1 false
@b = common global i32 0, align 4
@e = common global i8 0, align 1
@f = common global i8 0, align 1
@c = common global i32 0, align 4
@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1
; Check that we are clobbering the flags when they are live-in of the
; prologue block and the prologue needs to adjust the stack.
; PR25607.
define i32 @eflagsLiveInPrologue() #0 {
; ENABLE-LABEL: eflagsLiveInPrologue:
; ENABLE: ## %bb.0: ## %entry
; ENABLE-NEXT: movl L_a$non_lazy_ptr, %eax
; ENABLE-NEXT: cmpl $0, (%eax)
; ENABLE-NEXT: je LBB0_2
; ENABLE-NEXT: ## %bb.1: ## %if.then
; ENABLE-NEXT: movb $1, _d
; ENABLE-NEXT: LBB0_2: ## %for.cond.preheader
; ENABLE-NEXT: movl L_b$non_lazy_ptr, %eax
; ENABLE-NEXT: movl (%eax), %eax
; ENABLE-NEXT: testl %eax, %eax
; ENABLE-NEXT: je LBB0_4
; ENABLE-NEXT: .p2align 4, 0x90
; ENABLE-NEXT: LBB0_3: ## %for.body
; ENABLE-NEXT: ## =>This Inner Loop Header: Depth=1
; ENABLE-NEXT: jmp LBB0_3
; ENABLE-NEXT: LBB0_4: ## %for.end
; ENABLE-NEXT: pushl %esi
; ENABLE-NEXT: subl $8, %esp
; ENABLE-NEXT: xorl %edx, %edx
; ENABLE-NEXT: cmpb $0, _d
; ENABLE-NEXT: movl $6, %ecx
; ENABLE-NEXT: cmovnel %edx, %ecx
; ENABLE-NEXT: movl L_e$non_lazy_ptr, %edx
; ENABLE-NEXT: movb %cl, (%edx)
; ENABLE-NEXT: leal 1(%ecx), %esi
; ENABLE-NEXT: cltd
; ENABLE-NEXT: idivl %esi
; ENABLE-NEXT: movl L_c$non_lazy_ptr, %eax
; ENABLE-NEXT: movl %edx, (%eax)
; ENABLE-NEXT: movl %ecx, {{[0-9]+}}(%esp)
; ENABLE-NEXT: movl $L_.str, (%esp)
; ENABLE-NEXT: calll _varfunc
; ENABLE-NEXT: xorl %eax, %eax
; ENABLE-NEXT: addl $8, %esp
; ENABLE-NEXT: popl %esi
; ENABLE-NEXT: retl
;
; DISABLE-LABEL: eflagsLiveInPrologue:
; DISABLE: ## %bb.0: ## %entry
; DISABLE-NEXT: pushl %esi
; DISABLE-NEXT: subl $8, %esp
; DISABLE-NEXT: movl L_a$non_lazy_ptr, %eax
; DISABLE-NEXT: cmpl $0, (%eax)
; DISABLE-NEXT: je LBB0_2
; DISABLE-NEXT: ## %bb.1: ## %if.then
; DISABLE-NEXT: movb $1, _d
; DISABLE-NEXT: LBB0_2: ## %for.cond.preheader
; DISABLE-NEXT: movl L_b$non_lazy_ptr, %eax
; DISABLE-NEXT: movl (%eax), %eax
; DISABLE-NEXT: testl %eax, %eax
; DISABLE-NEXT: je LBB0_4
; DISABLE-NEXT: .p2align 4, 0x90
; DISABLE-NEXT: LBB0_3: ## %for.body
; DISABLE-NEXT: ## =>This Inner Loop Header: Depth=1
; DISABLE-NEXT: jmp LBB0_3
; DISABLE-NEXT: LBB0_4: ## %for.end
; DISABLE-NEXT: xorl %edx, %edx
; DISABLE-NEXT: cmpb $0, _d
; DISABLE-NEXT: movl $6, %ecx
; DISABLE-NEXT: cmovnel %edx, %ecx
; DISABLE-NEXT: movl L_e$non_lazy_ptr, %edx
; DISABLE-NEXT: movb %cl, (%edx)
; DISABLE-NEXT: leal 1(%ecx), %esi
; DISABLE-NEXT: cltd
; DISABLE-NEXT: idivl %esi
; DISABLE-NEXT: movl L_c$non_lazy_ptr, %eax
; DISABLE-NEXT: movl %edx, (%eax)
; DISABLE-NEXT: movl %ecx, {{[0-9]+}}(%esp)
; DISABLE-NEXT: movl $L_.str, (%esp)
; DISABLE-NEXT: calll _varfunc
; DISABLE-NEXT: xorl %eax, %eax
; DISABLE-NEXT: addl $8, %esp
; DISABLE-NEXT: popl %esi
; DISABLE-NEXT: retl
entry:
%tmp = load i32, ptr @a, align 4
%tobool = icmp eq i32 %tmp, 0
br i1 %tobool, label %for.cond.preheader, label %if.then
if.then: ; preds = %entry
store i1 true, ptr @d, align 1
br label %for.cond.preheader
for.cond.preheader: ; preds = %if.then, %entry
%tmp1 = load i32, ptr @b, align 4
%tobool14 = icmp eq i32 %tmp1, 0
br i1 %tobool14, label %for.end, label %for.body.preheader
for.body.preheader: ; preds = %for.cond.preheader
br label %for.body
for.body: ; preds = %for.body, %for.body.preheader
br label %for.body
for.end: ; preds = %for.cond.preheader
%.b3 = load i1, ptr @d, align 1
%tmp2 = select i1 %.b3, i8 0, i8 6
store i8 %tmp2, ptr @e, align 1
%tmp3 = load i8, ptr @e, align 1
%conv = sext i8 %tmp3 to i32
%add = add nsw i32 %conv, 1
%rem = srem i32 %tmp1, %add
store i32 %rem, ptr @c, align 4
%conv2 = select i1 %.b3, i32 0, i32 6
%call = tail call i32 (ptr, ...) @varfunc(ptr nonnull @.str, i32 %conv2) #1
ret i32 0
}
; Function Attrs: nounwind
declare i32 @varfunc(ptr nocapture readonly, ...) #0
attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-features"="+mmx,+sse" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind }