llvm/llvm/test/CodeGen/X86/pr34421.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=i686-apple-macosx10.13.0 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-apple-macosx10.13.0 | FileCheck %s --check-prefix=X64

define void @thread_selfcounts() noimplicitfloat noredzone nounwind {
; X86-LABEL: thread_selfcounts:
; X86:       ## %bb.0: ## %entry
; X86-NEXT:    subl $44, %esp
; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
; X86-NEXT:    movl %eax, (%esp)
; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT:    movl %ecx, {{[0-9]+}}(%esp)
; X86-NEXT:    movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT:    ud2
;
; X64-LABEL: thread_selfcounts:
; X64:       ## %bb.0: ## %entry
; X64-NEXT:    subq $40, %rsp
; X64-NEXT:    movq {{[0-9]+}}(%rsp), %rax
; X64-NEXT:    movq {{[0-9]+}}(%rsp), %rcx
; X64-NEXT:    movq %rax, (%rsp)
; X64-NEXT:    movq %rcx, {{[0-9]+}}(%rsp)
; X64-NEXT:    ud2
entry:
  %counts = alloca [2 x i64], align 16
  %thread_counts = alloca [3 x i64], align 16
  %0 = load i64, ptr %thread_counts, align 16
  store i64 %0, ptr %counts, align 16
  %arrayidx6 = getelementptr inbounds [3 x i64], ptr %thread_counts, i64 0, i64 1
  %1 = load i64, ptr %arrayidx6, align 8
  %arrayidx10 = getelementptr inbounds [2 x i64], ptr %counts, i64 0, i64 1
  store i64 %1, ptr %arrayidx10, align 8
  unreachable
}